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* [PATCH] riscv/mm: use physical alignment for vmemmap_start_pfn
@ 2026-07-16 11:53 Jiakai Xu
  2026-07-16 11:53 ` Jiakai Xu
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Jiakai Xu @ 2026-07-16 11:53 UTC (permalink / raw)
  To: linux-kernel, linux-riscv
  Cc: David Hildenbrand, Guo Ren, Mike Rapoport, Vishal Moola,
	Albert Ou, Alexandre Ghiti, Andrew Morton, Junhui Liu,
	Kiryl Shutsemau, Muchun Song, Nam Cao, Palmer Dabbelt,
	Paul Walmsley, Vivian Wang, Jiakai Xu

RISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to
VMEMMAP_ADDR_ALIGN. That alignment must therefore be expressed in the
physical-address domain.

Commit 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size")
attempted to account for the maximal folio alignment by feeding
MAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN. However,
MAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage,
whereas VMEMMAP_ADDR_ALIGN is used to align a physical address.

The mask-based compound_info encoding requires pfn_to_page(0) to be
naturally aligned to MAX_FOLIO_VMEMMAP_ALIGN. Commit 9f94db4c7eaa
("mm/sparse: check memmap alignment for compound_info_has_mask()")
added a check for that requirement and exposed the unit mismatch on
systems such as QEMU virt, where the DRAM base is not aligned to
MAX_FOLIO_NR_PAGES * PAGE_SIZE.

Convert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment
before using it in VMEMMAP_ADDR_ALIGN. This keeps the existing
round_down() logic while making the resulting vmemmap base satisfy the
mask-alignment requirement.

Fixes: 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size")
Signed-off-by: Jiakai Xu <xujiakai2025@iscas.ac.cn>
Assisted-by: YuanSheng:DeepSeek-V4-Flash
---
 arch/riscv/mm/init.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 3e450890be07..422efa11824b 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -63,7 +63,8 @@ EXPORT_SYMBOL(phys_ram_base);
 
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 #define VMEMMAP_ADDR_ALIGN	max(1ULL << SECTION_SIZE_BITS, \
-				    MAX_FOLIO_VMEMMAP_ALIGN)
+				    PFN_PHYS(MAX_FOLIO_VMEMMAP_ALIGN / \
+					     sizeof(struct page)))
 
 unsigned long vmemmap_start_pfn __ro_after_init;
 EXPORT_SYMBOL(vmemmap_start_pfn);
-- 
2.34.1


^ permalink raw reply	[flat|nested] 7+ messages in thread
* [PATCH] riscv/mm: use physical alignment for vmemmap_start_pfn
@ 2026-07-16 11:49 Jiakai Xu
  2026-07-16 12:04 ` Jiakai Xu
  0 siblings, 1 reply; 7+ messages in thread
From: Jiakai Xu @ 2026-07-16 11:49 UTC (permalink / raw)
  To: linux-kernel, linux-riscv
  Cc: David Hildenbrand, Guo Ren, Mike Rapoport, Vishal Moola,
	Albert Ou, Alexandre Ghiti, Andrew Morton, Junhui Liu,
	Kiryl Shutsemau, Muchun Song, Nam Cao, Palmer Dabbelt,
	Paul Walmsley, Vivian Wang, Jiakai Xu

RISC-V computes vmemmap_start_pfn by rounding phys_ram_base down to
VMEMMAP_ADDR_ALIGN. That alignment must therefore be expressed in the
physical-address domain.

Commit 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size")
attempted to account for the maximal folio alignment by feeding
MAX_FOLIO_VMEMMAP_ALIGN directly into VMEMMAP_ADDR_ALIGN. However,
MAX_FOLIO_VMEMMAP_ALIGN is measured in bytes of struct page storage,
whereas VMEMMAP_ADDR_ALIGN is used to align a physical address.

The mask-based compound_info encoding requires pfn_to_page(0) to be
naturally aligned to MAX_FOLIO_VMEMMAP_ALIGN. Commit 9f94db4c7eaa
("mm/sparse: check memmap alignment for compound_info_has_mask()")
added a check for that requirement and exposed the unit mismatch on
systems such as QEMU virt, where the DRAM base is not aligned to
MAX_FOLIO_NR_PAGES * PAGE_SIZE.

Convert MAX_FOLIO_VMEMMAP_ALIGN to the equivalent physical alignment
before using it in VMEMMAP_ADDR_ALIGN. This keeps the existing
round_down() logic while making the resulting vmemmap base satisfy the
mask-alignment requirement.

Fixes: 476849b0fba4 ("riscv/mm: align vmemmap to maximal folio size")
Signed-off-by: Jiakai Xu <xujiakai2025@iscas.ac.cn>
Assisted-by: YuanSheng:DeepSeek-V4-Flash
---
 arch/riscv/mm/init.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 3e450890be07..422efa11824b 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -63,7 +63,8 @@ EXPORT_SYMBOL(phys_ram_base);
 
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 #define VMEMMAP_ADDR_ALIGN	max(1ULL << SECTION_SIZE_BITS, \
-				    MAX_FOLIO_VMEMMAP_ALIGN)
+				    PFN_PHYS(MAX_FOLIO_VMEMMAP_ALIGN / \
+					     sizeof(struct page)))
 
 unsigned long vmemmap_start_pfn __ro_after_init;
 EXPORT_SYMBOL(vmemmap_start_pfn);
-- 
2.34.1


^ permalink raw reply	[flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-07-20  9:20 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-07-16 11:53 [PATCH] riscv/mm: use physical alignment for vmemmap_start_pfn Jiakai Xu
2026-07-16 11:53 ` Jiakai Xu
2026-07-18  2:23 ` Andrew Morton
2026-07-20  8:52 ` David Hildenbrand (Arm)
2026-07-20  9:20 ` Muchun Song
  -- strict thread matches above, loose matches on Subject: below --
2026-07-16 11:49 Jiakai Xu
2026-07-16 12:04 ` Jiakai Xu

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