From: Andrew Jones <andrew.jones@oss.qualcomm.com>
To: linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
tglx@kernel.org, kevin.tian@intel.com,
fangyu.yu@linux.alibaba.com
Subject: [PATCH v3 11/19] iommu/riscv: Copy MSI IOVA table when replacing an iommufd domain
Date: Fri, 7 Aug 2026 20:17:05 +0200 [thread overview]
Message-ID: <20260807181713.228535-12-andrew.jones@oss.qualcomm.com> (raw)
In-Reply-To: <20260807181713.228535-1-andrew.jones@oss.qualcomm.com>
iommufd may replace one paging domain with another on a device while
leaving the device otherwise operational, e.g. when converting a
device's HWPT. If the old domain already had a populated MSI IOVA
table then the new domain must inherit that table rather than wait
to build its own, since the MSI IOVAs are only built on the next
irq_domain_alloc_irqs(), which does not happen on a domain
replacement.
Only copy from an old domain that is a genuine RISC-V paging domain;
iommu.c already has riscv_iommu_paging_domain_ops in scope to check
this, so do the check there and pass NULL down on a mismatch. This
keeps riscv_iommu_ir_attach_paging_domain() simple: a non-NULL old is
always safe to cast with iommu_domain_to_riscv().
Only iommufd cookie domains are copied from and to, since VFIO type1
and DMA API domains build their own tables from irq_domain_alloc_irqs()
before any device is attached, and are never replaced while a device is
live.
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
---
drivers/iommu/riscv/iommu-ir.c | 78 ++++++++++++++++++++++++++++++++--
drivers/iommu/riscv/iommu.h | 2 +
2 files changed, 77 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/riscv/iommu-ir.c b/drivers/iommu/riscv/iommu-ir.c
index 0dff74aa9b18..7d9a1eaca92e 100644
--- a/drivers/iommu/riscv/iommu-ir.c
+++ b/drivers/iommu/riscv/iommu-ir.c
@@ -118,18 +118,26 @@ static int riscv_iommu_ir_irq_domain_alloc_irqs(struct irq_domain *irqdomain,
* quiesced, including MSI teardown, before switching away from or freeing
* the domain. iommu_dma_map_msi() requires the group mutex to be held;
* take it around the domain lookup too so info->domain can't change
- * out from under the build.
+ * out from under the build. Bump info->nr_msis here too, before
+ * irq_domain_alloc_irqs_parent() runs unlocked below, so a concurrent
+ * riscv_iommu_ir_attach_paging_domain() can never observe a count that
+ * is lower than the number of MSIs actually in flight for this device.
*/
scoped_guard(iommu_group, info->dev) {
domain = rcu_dereference_protected(info->domain, true);
ret = domain ? riscv_iommu_ir_build_msi_iova(domain, info->dev) : 0;
+ if (!ret)
+ info->nr_msis += nr_irqs;
}
if (ret)
return ret;
ret = irq_domain_alloc_irqs_parent(irqdomain, irq_base, nr_irqs, arg);
- if (ret)
+ if (ret) {
+ guard(iommu_group)(info->dev);
+ info->nr_msis -= nr_irqs;
return ret;
+ }
for (i = 0; i < nr_irqs; i++) {
data = irq_domain_get_irq_data(irqdomain, irq_base + i);
@@ -139,9 +147,25 @@ static int riscv_iommu_ir_irq_domain_alloc_irqs(struct irq_domain *irqdomain,
return 0;
}
+static void riscv_iommu_ir_irq_domain_free_irqs(struct irq_domain *irqdomain,
+ unsigned int irq_base, unsigned int nr_irqs)
+{
+ struct riscv_iommu_info *info = irqdomain->host_data;
+
+ irq_domain_free_irqs_parent(irqdomain, irq_base, nr_irqs);
+
+ /*
+ * Decrement only after the parent free completes, so a concurrent
+ * riscv_iommu_ir_attach_paging_domain() never observes a count lower
+ * than the number of MSIs that are actually still live.
+ */
+ scoped_guard(iommu_group, info->dev)
+ info->nr_msis -= nr_irqs;
+}
+
static const struct irq_domain_ops riscv_iommu_ir_irq_domain_ops = {
.alloc = riscv_iommu_ir_irq_domain_alloc_irqs,
- .free = irq_domain_free_irqs_parent,
+ .free = riscv_iommu_ir_irq_domain_free_irqs,
};
static const struct msi_parent_ops riscv_iommu_ir_msi_parent_ops = {
@@ -213,6 +237,54 @@ void riscv_iommu_ir_irq_domain_remove(struct device *dev, struct riscv_iommu_inf
int riscv_iommu_ir_attach_paging_domain(struct iommu_domain *iommu_domain, struct device *dev,
struct iommu_domain *old)
{
+ struct riscv_iommu_domain *domain = iommu_domain_to_riscv(iommu_domain);
+ struct riscv_iommu_info *info = dev_iommu_priv_get(dev);
+ struct riscv_iommu_domain *old_domain = NULL;
+ dma_addr_t *msi_iova = NULL;
+
+ if (old && (old->type & __IOMMU_DOMAIN_PAGING))
+ old_domain = iommu_domain_to_riscv(old);
+
+ /*
+ * Copying is only correct between two IOMMUFD domains: their MSI IOVAs
+ * come from the fd-wide SW_MSI reservation, so they match across
+ * domain instances. Every other cookie type derives its MSI IOVAs from
+ * domain-local allocator state.
+ */
+ if (old_domain && old_domain->domain.cookie_type == IOMMU_COOKIE_IOMMUFD &&
+ iommu_domain->cookie_type == IOMMU_COOKIE_IOMMUFD) {
+ scoped_guard(mutex, &old_domain->mutex) {
+ if (old_domain->msi_iova) {
+ msi_iova = kmemdup(old_domain->msi_iova,
+ riscv_iommu_ir_msi_iova_count() *
+ sizeof(*msi_iova),
+ GFP_KERNEL);
+ if (!msi_iova)
+ return -ENOMEM;
+ }
+ }
+
+ if (msi_iova) {
+ guard(mutex)(&domain->mutex);
+
+ if (domain->msi_iova)
+ kfree(msi_iova);
+ else
+ domain->msi_iova = msi_iova;
+
+ return 0;
+ }
+ }
+
+ /*
+ * No table to copy: build one from scratch if this device has ever
+ * allocated MSIs, since those MSIs may already be live and expecting
+ * riscv_iommu_ir_compose_msi_msg() to find a populated table for
+ * whatever domain is now attached.
+ */
+ if (info->nr_msis)
+ return riscv_iommu_ir_build_msi_iova(domain, dev);
+
return 0;
}
diff --git a/drivers/iommu/riscv/iommu.h b/drivers/iommu/riscv/iommu.h
index 8bd41dd63f0e..77328282a236 100644
--- a/drivers/iommu/riscv/iommu.h
+++ b/drivers/iommu/riscv/iommu.h
@@ -46,6 +46,8 @@ struct riscv_iommu_info {
struct riscv_iommu_domain __rcu *domain;
struct irq_domain *irqdomain;
struct device *dev;
+ /* Number of currently allocated MSIs; protected by the group mutex */
+ unsigned int nr_msis;
};
struct riscv_iommu_device;
--
2.43.0
next prev parent reply other threads:[~2026-08-07 18:17 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 18:16 [PATCH v3 00/19] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO Andrew Jones
2026-08-07 18:16 ` [PATCH v3 01/19] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
2026-08-07 18:16 ` [PATCH v3 02/19] iommufd: Add iommufd_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` [PATCH v3 03/19] iommu/dma: Add iommu_dma_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` [PATCH v3 04/19] iommu/dma: Add iommu_dma_map_msi() Andrew Jones
2026-08-07 18:16 ` [PATCH v3 05/19] genirq/msi: Provide DOMAIN_BUS_MSI_REMAP Andrew Jones
2026-08-07 18:17 ` [PATCH v3 06/19] irqchip/riscv-imsic: Compose MSI updates through the hierarchy Andrew Jones
2026-08-07 20:25 ` Thomas Gleixner
2026-08-10 8:01 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 07/19] iommu/riscv: Add IRQ domain for interrupt remapping Andrew Jones
2026-08-07 20:32 ` Thomas Gleixner
2026-08-07 20:36 ` Thomas Gleixner
2026-08-10 8:11 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 08/19] iommu/riscv: Prepare info->domain for concurrent RCU read access Andrew Jones
2026-08-07 18:17 ` [PATCH v3 09/19] iommu/riscv: Publish IOMMU_RESV_SW_MSI region for iommufd MSI remapping Andrew Jones
2026-08-07 18:17 ` [PATCH v3 10/19] iommu/riscv: Pre-map IMSIC MSI targets Andrew Jones
2026-08-07 18:17 ` Andrew Jones [this message]
2026-08-07 18:17 ` [PATCH v3 12/19] iommu/riscv: Gate identity boundary switches with live MSIs Andrew Jones
2026-08-07 18:17 ` [PATCH v3 13/19] iommu/riscv: Implement irq_compose_msi_msg for IMSIC remapping Andrew Jones
2026-08-07 18:17 ` [PATCH v3 14/19] iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V Andrew Jones
2026-08-07 18:17 ` [PATCH v3 15/19] iommu/riscv: report iommu capabilities Andrew Jones
2026-08-07 18:17 ` [PATCH v3 16/19] vfio: enable IOMMU_TYPE1 for RISC-V Andrew Jones
2026-08-07 18:17 ` [PATCH v3 17/19] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Andrew Jones
2026-08-07 18:17 ` [PATCH v3 18/19] riscv: defconfig: Enable IOMMUFD and VFIO Andrew Jones
2026-08-07 18:17 ` [PATCH v3 19/19] selftests/vfio: Allow building on RISC-V Andrew Jones
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