[PATCH v3 00/19] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO

[Andrew Jones <andrew.jones@oss.qualcomm.com>]

This series adds MSI remapping for IMSIC so a device's MSI target gets
translated the same way its DMA does, allowing RISC-V to enable IOMMU_DMA
and paging domains by default.

v1[1] used get_resv_regions() with IOMMU_RESV_DIRECT_RELAXABLE to identity
map IMSIC pages, but that was rejected as only a workaround, and the
proposal for v2 was to follow ARM's approach. ARM calls
iommu_dma_prepare_msi() once at IRQ-alloc time, caches the IOVA on the
msi_desc, and lets compose replay it via msi_msg_set_addr(). This series
follows that structure by introducing an IRQ domain and a new
iommu_dma_map_msi(). Like iommu_dma_prepare_msi(), it dispatches on the
same domain cookie types. Unlike iommu_dma_prepare_msi(), it returns the
IOVA to the caller instead of caching it on a descriptor. That allows the
caller to collect all IOVAs needed (since IMSIC needs one IOVA per host
IMSIC page). Like ARM, msi_msg_set_addr() is used at compose time to
direct MSIs to the appropriate IOVAs.

The divergence from ARM is required due to where the target address
actually lives. ARM's doorbell PA is fixed per ITS instance (affinity
changes only retarget hardware routing, never the composed address) so
one IOVA cached at alloc time stays valid for the descriptor's lifetime.
IMSIC doesn't have a fixed target, the MSI address itself changes on
irq_set_affinity(), and that runs in atomic context, so mapping a fresh
IOVA isn't an option. This series pre-maps every IMSIC page into a
domain-wide PA-to-IOVA table at first IRQ-alloc time, and compose does an
O(1) lookup to pick the right one.

With the DMA path in place, v3 also carries the remaining plumbing needed
for RISC-V PCIe device assignment through VFIO/KVM: the RISC-V IOMMU
reports DMA cache-coherency capability, VFIO type1 and KVM_VFIO are
enabled for RISC-V, defconfig enables IOMMUFD/VFIO as modules with cdev
support, and the generic VFIO/iommufd selftests can be built for RISC-V.
The interrupt-remapping domain does not yet validate MSI data, so VFIO
still requires allow_unsafe_interrupts=1. Direct MSI routing to guest
interrupt files (irqbypass) is not yet supported by this series.
irqbypass will be posted separately on top.

LLM-based coding assistants were used during development for code
exploration ("super grep" as one of my colleagues calls it), patch review,
test execution, and commit-message iteration, but all resulting code and
commit messages were selected, reviewed, and finalized by me. Per-patch
Assisted-by tags are omitted in light of the ongoing discussion about
simplifying coding-assistant attribution[2].

Thanks,
drew

[1] https://lore.kernel.org/all/20260508212339.381933-1-andrew.jones@oss.qualcomm.com/
[2] https://lore.kernel.org/all/20260701-work-coding-assistants-v1-1-a20a94d1d606@kernel.org/

v3:
- Addressed Sashiko's v2 comments[3]
- Added RISC-V VFIO/KVM enablement patches and VFIO selftest build support
- Capped SW MSI bitmap growth at 16K entries to simplify the growth arithmetic
- Tracked live MSI allocations so domain replacement can rebuild MSI IOVA
  tables when no iommufd table can be copied
- Add a patch to guard against identity <-> paging domain changes with
  in-flight MSIs

[3] https://sashiko.dev/#/patchset/20260724151218.965929-1-andrew.jones@oss.qualcomm.com


Andrew Jones (15):
  iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap
  iommufd: Add iommufd_sw_map_msi()
  iommu/dma: Add iommu_dma_sw_map_msi()
  iommu/dma: Add iommu_dma_map_msi()
  genirq/msi: Provide DOMAIN_BUS_MSI_REMAP
  irqchip/riscv-imsic: Compose MSI updates through the hierarchy
  iommu/riscv: Add IRQ domain for interrupt remapping
  iommu/riscv: Prepare info->domain for concurrent RCU read access
  iommu/riscv: Publish IOMMU_RESV_SW_MSI region for iommufd MSI
    remapping
  iommu/riscv: Pre-map IMSIC MSI targets
  iommu/riscv: Copy MSI IOVA table when replacing an iommufd domain
  iommu/riscv: Gate identity boundary switches with live MSIs
  iommu/riscv: Implement irq_compose_msi_msg for IMSIC remapping
  riscv: defconfig: Enable IOMMUFD and VFIO
  selftests/vfio: Allow building on RISC-V

Tomasz Jeznach (4):
  iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V
  iommu/riscv: report iommu capabilities
  vfio: enable IOMMU_TYPE1 for RISC-V
  RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch

 arch/riscv/configs/defconfig               |   4 +
 arch/riscv/kvm/Kconfig                     |   1 +
 drivers/iommu/Kconfig                      |   2 +-
 drivers/iommu/dma-iommu.c                  |  32 +-
 drivers/iommu/dma-iommu.h                  |  12 +-
 drivers/iommu/iommu-priv.h                 |  11 +-
 drivers/iommu/iommu.c                      | 104 +++++-
 drivers/iommu/iommufd/device.c             |   3 +-
 drivers/iommu/iommufd/driver.c             |  79 +++--
 drivers/iommu/iommufd/hw_pagetable.c       |   1 +
 drivers/iommu/iommufd/iommufd_private.h    |  41 ++-
 drivers/iommu/riscv/Kconfig                |   1 +
 drivers/iommu/riscv/Makefile               |   2 +-
 drivers/iommu/riscv/iommu-ir.c             | 353 +++++++++++++++++++++
 drivers/iommu/riscv/iommu.c                | 100 ++++--
 drivers/iommu/riscv/iommu.h                |  41 +++
 drivers/irqchip/irq-msi-lib.c              |   8 +-
 drivers/irqchip/irq-riscv-imsic-platform.c |  27 +-
 drivers/vfio/Kconfig                       |   2 +-
 include/linux/iommu.h                      |  31 ++
 include/linux/irqchip/riscv-imsic.h        |   7 +
 include/linux/irqdomain_defs.h             |   1 +
 tools/testing/selftests/vfio/Makefile      |   2 +-
 23 files changed, 749 insertions(+), 116 deletions(-)
 create mode 100644 drivers/iommu/riscv/iommu-ir.c

-- 
2.43.0