* [PATCH v5 1/4] arm64: dts: qcom: pm4125: Add VADC and temp alarm nodes
2026-08-09 14:07 [PATCH v5 0/4] arm64: dts: qcom: Add PMIC thermal support for Shikra platforms Jishnu Prakash
@ 2026-08-09 14:07 ` Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 2/4] arm64: dts: qcom: pm8005: Add temp alarm node Jishnu Prakash
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Jishnu Prakash @ 2026-08-09 14:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Kamal Wadhwa,
Rakesh Kota, Jishnu Prakash, Konrad Dybcio
Add VADC node with some channels under it, for voltage and
temperature readings. Add temperature alarm node, used for
PMIC thermal mitigation.
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/pm4125.dtsi | 104 +++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm4125.dtsi b/arch/arm64/boot/dts/qcom/pm4125.dtsi
index 3dc8d667d091..77de9db8c119 100644
--- a/arch/arm64/boot/dts/qcom/pm4125.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm4125.dtsi
@@ -8,6 +8,35 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
+/ {
+ thermal-zones {
+ pm4125-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&pm4125_tz>;
+
+ trips {
+ pm4125_trip0: trip0 {
+ temperature = <105000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ pm4125_trip1: trip1 {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ pm4125_trip2: trip2 {
+ temperature = <155000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
&spmi_bus {
pmic@0 {
compatible = "qcom,pm2250", "qcom,spmi-pmic";
@@ -65,6 +94,81 @@ pm4125_typec: typec@1500 {
status = "disabled";
};
+ pm4125_tz: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ io-channels = <&pm4125_adc ADC5_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pm4125_adc: adc@3100 {
+ compatible = "qcom,spmi-adc5";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ /* Channel nodes */
+ channel@0 {
+ reg = <ADC5_REF_GND>;
+ label = "ref_gnd";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@1 {
+ reg = <ADC5_1P25VREF>;
+ label = "vref_1p25";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@6 {
+ reg = <ADC5_DIE_TEMP>;
+ label = "die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@7 {
+ reg = <ADC5_USB_IN_I>;
+ label = "usb_in_i_uv";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@8 {
+ reg = <ADC5_USB_IN_V_16>;
+ label = "usb_in_v_div_16";
+ qcom,pre-scaling = <1 16>;
+ };
+
+ channel@9 {
+ reg = <ADC5_CHG_TEMP>;
+ label = "chg_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@4b {
+ reg = <ADC5_BAT_ID_100K_PU>;
+ label = "bat_id";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@83 {
+ reg = <ADC5_VPH_PWR>;
+ label = "vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+
+ channel@84 {
+ reg = <ADC5_VBAT_SNS>;
+ label = "vbat_sns";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v5 2/4] arm64: dts: qcom: pm8005: Add temp alarm node
2026-08-09 14:07 [PATCH v5 0/4] arm64: dts: qcom: Add PMIC thermal support for Shikra platforms Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 1/4] arm64: dts: qcom: pm4125: Add VADC and temp alarm nodes Jishnu Prakash
@ 2026-08-09 14:07 ` Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S " Jishnu Prakash
3 siblings, 0 replies; 5+ messages in thread
From: Jishnu Prakash @ 2026-08-09 14:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Kamal Wadhwa,
Rakesh Kota, Jishnu Prakash, Konrad Dybcio
Add temperature alarm node along with thermal zone used
for PMIC thermal mitigation.
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/pm8005.dtsi | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm8005.dtsi b/arch/arm64/boot/dts/qcom/pm8005.dtsi
index 0f0ab2da8305..ce31a8545020 100644
--- a/arch/arm64/boot/dts/qcom/pm8005.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8005.dtsi
@@ -4,6 +4,34 @@
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/interrupt-controller/irq.h>
+/ {
+ thermal-zones {
+ pm8005-thermal {
+ thermal-sensors = <&pm8005_tz>;
+
+ trips {
+ pm8005_trip0: trip0 {
+ temperature = <105000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ pm8005_trip1: trip1 {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ pm8005_trip2: trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
&spmi_bus {
pm8005_lsid0: pmic@4 {
compatible = "qcom,pm8005", "qcom,spmi-pmic";
@@ -11,6 +39,13 @@ pm8005_lsid0: pmic@4 {
#address-cells = <1>;
#size-cells = <0>;
+ pm8005_tz: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ #thermal-sensor-cells = <0>;
+ };
+
pm8005_gpios: gpio@c000 {
compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v5 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform
2026-08-09 14:07 [PATCH v5 0/4] arm64: dts: qcom: Add PMIC thermal support for Shikra platforms Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 1/4] arm64: dts: qcom: pm4125: Add VADC and temp alarm nodes Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 2/4] arm64: dts: qcom: pm8005: Add temp alarm node Jishnu Prakash
@ 2026-08-09 14:07 ` Jishnu Prakash
2026-08-09 14:07 ` [PATCH v5 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S " Jishnu Prakash
3 siblings, 0 replies; 5+ messages in thread
From: Jishnu Prakash @ 2026-08-09 14:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Kamal Wadhwa,
Rakesh Kota, Jishnu Prakash, Konrad Dybcio
Add ADC channels for pa, quiet and msm thermistors along with
their ADC thermal bridge nodes and thermal zones for PMIC
thermal mitigation.
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 120 +++++++++++++++++++++++++++
1 file changed, 120 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index 8ac42ff625a0..9caff1a70d13 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "shikra.dtsi"
@@ -32,6 +33,68 @@ key-volume-up {
};
};
+ msm_therm_bridge: msm-therm-bridge {
+ compatible = "generic-adc-thermal";
+ io-channels = <&pm4125_adc ADC5_AMUX_THM3_100K_PU>;
+ io-channel-names = "sensor-channel";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pa_therm_bridge: pa-therm-bridge {
+ compatible = "generic-adc-thermal";
+ io-channels = <&pm4125_adc ADC5_AMUX_THM1_100K_PU>;
+ io-channel-names = "sensor-channel";
+ #thermal-sensor-cells = <0>;
+ };
+
+ quiet_therm_bridge: quiet-therm-bridge {
+ compatible = "generic-adc-thermal";
+ io-channels = <&pm4125_adc ADC5_AMUX_THM2_100K_PU>;
+ io-channel-names = "sensor-channel";
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ sys-1-thermal {
+ polling-delay-passive = <2000>;
+ thermal-sensors = <&pa_therm_bridge>;
+
+ trips {
+ active-config0 {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ sys-2-thermal {
+ polling-delay-passive = <2000>;
+ thermal-sensors = <&quiet_therm_bridge>;
+
+ trips {
+ active-config0 {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ sys-3-thermal {
+ polling-delay-passive = <2000>;
+ thermal-sensors = <&msm_therm_bridge>;
+
+ trips {
+ active-config0 {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+ };
+
wcn3988-pmu {
compatible = "qcom,wcn3988-pmu";
@@ -69,7 +132,64 @@ vreg_pmu_ch1: ldo4 {
};
};
+&pm4125_adc {
+ pinctrl-0 = <&pm4125_adc_gpio5_default>, <&pm4125_adc_gpio6_default>;
+ pinctrl-names = "default";
+
+ channel@4d {
+ reg = <ADC5_AMUX_THM1_100K_PU>;
+ label = "pa_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@4e {
+ reg = <ADC5_AMUX_THM2_100K_PU>;
+ label = "quiet_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@4f {
+ reg = <ADC5_AMUX_THM3_100K_PU>;
+ label = "msm_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@54 {
+ reg = <ADC5_GPIO3_100K_PU>;
+ label = "chgr_skin";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@55 {
+ reg = <ADC5_GPIO4_100K_PU>;
+ label = "gnss_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+};
+
&pm4125_gpios {
+ pm4125_adc_gpio5_default: pm4125-adc-gpio5-state {
+ pins = "gpio5";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ bias-high-impedance;
+ };
+
+ pm4125_adc_gpio6_default: pm4125-adc-gpio6-state {
+ pins = "gpio6";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ bias-high-impedance;
+ };
+
vol_up_n: vol-up-n-state {
pins = "gpio9";
function = PMIC_GPIO_FUNC_NORMAL;
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v5 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S SoM platform
2026-08-09 14:07 [PATCH v5 0/4] arm64: dts: qcom: Add PMIC thermal support for Shikra platforms Jishnu Prakash
` (2 preceding siblings ...)
2026-08-09 14:07 ` [PATCH v5 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform Jishnu Prakash
@ 2026-08-09 14:07 ` Jishnu Prakash
3 siblings, 0 replies; 5+ messages in thread
From: Jishnu Prakash @ 2026-08-09 14:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Kamal Wadhwa,
Rakesh Kota, Jishnu Prakash, Konrad Dybcio
Add ADC channels for system thermistors, used for thermal mitigation.
Add ADC_TM nodes for pa/quiet/msm thermistors and also thermal zones
for them.
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 113 +++++++++++++++++++++++++++
1 file changed, 113 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
index 4ff97945274d..ede34d82de76 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "shikra.dtsi"
@@ -31,6 +32,44 @@ key-volume-up {
};
};
+ thermal-zones {
+ sys-1-thermal {
+ thermal-sensors = <&pm8150_adc_tm 0>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ sys-2-thermal {
+ thermal-sensors = <&pm8150_adc_tm 1>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ sys-3-thermal {
+ thermal-sensors = <&pm8150_adc_tm 2>;
+
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+ };
+
vreg_wcn_3p3: regulator-wcn-3p3 {
compatible = "regulator-fixed";
regulator-name = "wcn_3p3";
@@ -76,7 +115,81 @@ vreg_pmu_ch1: ldo4 {
};
};
+&pm8150_adc {
+ pinctrl-0 = <&pm8150_adc_gpio2_default>, <&pm8150_adc_gpio3_default>;
+ pinctrl-names = "default";
+
+ channel@4d {
+ reg = <ADC5_AMUX_THM1_100K_PU>;
+ label = "msm_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@4e {
+ reg = <ADC5_AMUX_THM2_100K_PU>;
+ label = "quiet_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@52 {
+ reg = <ADC5_GPIO1_100K_PU>;
+ label = "gnss_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ channel@55 {
+ reg = <ADC5_GPIO4_100K_PU>;
+ label = "pa_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+};
+
+&pm8150_adc_tm {
+ status = "okay";
+
+ pa-therm@0 {
+ reg = <0>;
+ io-channels = <&pm8150_adc ADC5_GPIO4_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+
+ quiet-therm@1 {
+ reg = <1>;
+ io-channels = <&pm8150_adc ADC5_AMUX_THM2_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+
+ msm-therm@2 {
+ reg = <2>;
+ io-channels = <&pm8150_adc ADC5_AMUX_THM1_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time-us = <200>;
+ };
+};
+
&pm8150_gpios {
+ pm8150_adc_gpio2_default: pm8150-adc-gpio2-state {
+ pins = "gpio2";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ bias-high-impedance;
+ };
+
+ pm8150_adc_gpio3_default: pm8150-adc-gpio3-state {
+ pins = "gpio3";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ bias-high-impedance;
+ };
+
vol_up_n: vol-up-n-state {
pins = "gpio6";
function = PMIC_GPIO_FUNC_NORMAL;
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread