From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v4 7/8] soc: starfive: Add socinfo driver for JHB100 SoC
Date: Thu, 13 Aug 2026 17:46:31 +0100 [thread overview]
Message-ID: <20260813-presoak-scarily-b6cdecfcb7cc@spud> (raw)
In-Reply-To: <ZQ4PR01MB1202F016AD1F1E699429DDC0F2DB2@ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn>
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On Thu, Aug 13, 2026 at 08:10:12AM +0000, Changhuang Liang wrote:
> Hi ,Conor
>
> Thanks for the review.
>
> > On Wed, Aug 12, 2026 at 10:37:16AM +0000, Changhuang Liang wrote:
> > > Hi, Conor
> > >
> > > Thanks for the review.
> > >
> > > > On Tue, Aug 11, 2026 at 05:36:19AM +0000, Changhuang Liang wrote:
> > > >
> > > > > > On Sat, Aug 08, 2026 at 06:50:53PM -0700, Changhuang Liang wrote:
> > > >
> > > > > > > +static int __init starfive_socinfo_init(void) {
> > > > > > > + struct soc_device_attribute *attrs;
> > > > > > > + struct soc_device *soc_dev;
> > > > > > > + const char *machine = NULL;
> > > > > > > + struct device_node *np;
> > > > > > > + struct regmap *regmap;
> > > > > > > + char rev_char;
> > > > > > > + u32 rev_id;
> > > > > > > + int ret;
> > > > > > > +
> > > > > > > + np = of_find_compatible_node(NULL, NULL,
> > > > > > > +"starfive,jhb100-sys0-syscon");
> > > > > >
> > > > > > Remind me again why this is not just probed as an mfd cell from
> > > > > > the syscon driver?
> > > > > >
> > > > > > (Hint: please put this info in the commit message).
> > > > >
> > > > > The discussion result with Krzysztof at that time is recorded here:
> > > > > https://lore.kernel.org/all/20260405-strong-watchful-marmot-fdfad6
> > > > > @quo
> > > > > ll/
> > > > >
> > > > > One register should not be treated as a separate device node.
> > > >
> > > > That's a different question. In the case of an mfd cell probed from
> > > > the syscon driver there would be no devicetree modifications
> > > > required compared to what you have now. e.g. sg2044-topsys.c
> > >
> > > This seems feasible, and I can introduce this modification in the next
> > version.
> >
> >
> > In fact, you don't even need the mfd cell, because your driver is going to be in
> > drivers/soc/starfive anyway? You can just bind directly to the
> > sys0 syscon I think.
>
> I suddenly realized that I missed one issue: starfive,jhb100-sys0-syscon is already
> bound to the PLL driver by default, I can't use it to bind another device anymore.
>
> which is why I used
>
> np = of_find_compatible_node(NULL, NULL, "starfive,jhb100-sys0-syscon");
>
> in jhb100-socinfo.c.
>
> So it seems the MFD cell approach isn't really feasible either?
You could, in that case, probe the clock driver using the mfd_cell like
sg2044-topsys. What else other than the pll controls and the soc info
register is in this register region?
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next prev parent reply other threads:[~2026-08-13 16:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-09 1:50 [PATCH v4 0/8] Add StarFive JHB100 syscon modules Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 1/8] dt-bindings: soc: starfive: " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 2/8] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-08-10 16:22 ` Conor Dooley
2026-08-11 11:15 ` Changhuang Liang
2026-08-10 20:23 ` Brian Masney
2026-08-11 11:54 ` Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 3/8] clk: starfive: Add peripheral-0 " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 4/8] clk: starfive: Add Peripheral-1 " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 5/8] reset: starfive: Introduce active_low Changhuang Liang
2026-08-10 16:22 ` Conor Dooley
2026-08-09 1:50 ` [PATCH v4 6/8] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 7/8] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-08-10 16:05 ` Conor Dooley
2026-08-11 5:36 ` Changhuang Liang
2026-08-11 17:00 ` Conor Dooley
2026-08-12 10:37 ` Changhuang Liang
2026-08-12 15:59 ` Conor Dooley
2026-08-13 8:10 ` Changhuang Liang
2026-08-13 16:46 ` Conor Dooley [this message]
2026-08-14 1:13 ` Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 8/8] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-08-10 16:21 ` Conor Dooley
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