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* [PATCH 0/2] regmap: Test caches for regmaps with high bits set in register numbers
@ 2026-08-16 22:13 Mark Brown
  2026-08-16 22:13 ` [PATCH 1/2] regmap: Allow a base register to be specified for the RAM regmap Mark Brown
  2026-08-16 22:13 ` [PATCH 2/2] regmap: Test rbtree and maple caches for very high register numbers Mark Brown
  0 siblings, 2 replies; 3+ messages in thread
From: Mark Brown @ 2026-08-16 22:13 UTC (permalink / raw)
  To: linux-kernel, Mark Brown

We had some bugs in the past with the high bit set, add some coverage
for this to ensure it doesn't creep in.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
Mark Brown (2):
      regmap: Allow a base register to be specified for the RAM regmap
      regmap: Test rbtree and maple caches for very high register numbers

 drivers/base/regmap/internal.h     |  1 +
 drivers/base/regmap/regmap-kunit.c | 94 +++++++++++++++++++++++++++++++++++++-
 drivers/base/regmap/regmap-ram.c   | 26 ++++++++---
 3 files changed, 114 insertions(+), 7 deletions(-)
---
base-commit: 23688febe4b44b10f4b454eb1cde0ba379a84119
change-id: 20260815-regmap-kunit-cache-high-bit-ddf03045f4a8

Best regards,
--  
Mark Brown <broonie@kernel.org>


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 1/2] regmap: Allow a base register to be specified for the RAM regmap
  2026-08-16 22:13 [PATCH 0/2] regmap: Test caches for regmaps with high bits set in register numbers Mark Brown
@ 2026-08-16 22:13 ` Mark Brown
  2026-08-16 22:13 ` [PATCH 2/2] regmap: Test rbtree and maple caches for very high register numbers Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2026-08-16 22:13 UTC (permalink / raw)
  To: linux-kernel, Mark Brown

To allow testing of register maps with very large register values add
support for specifying base address to the RAM regmap.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/base/regmap/internal.h   |  1 +
 drivers/base/regmap/regmap-ram.c | 26 ++++++++++++++++++++------
 2 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index 55273a6178f8..8176d91aacd1 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h
@@ -322,6 +322,7 @@ static inline unsigned int regcache_get_index_by_order(const struct regmap *map,
 }
 
 struct regmap_ram_data {
+	unsigned int base_reg;
 	unsigned int *vals;  /* Allocatd by caller */
 	bool *read;
 	bool *written;
diff --git a/drivers/base/regmap/regmap-ram.c b/drivers/base/regmap/regmap-ram.c
index c7356b0d8c83..a666bfb4d667 100644
--- a/drivers/base/regmap/regmap-ram.c
+++ b/drivers/base/regmap/regmap-ram.c
@@ -20,8 +20,11 @@ static int regmap_ram_write(void *context, unsigned int reg, unsigned int val)
 {
 	struct regmap_ram_data *data = context;
 
-	data->vals[reg] = val;
-	data->written[reg] = true;
+	if (reg < data->base_reg)
+		return -EINVAL;
+
+	data->vals[reg - data->base_reg] = val;
+	data->written[reg - data->base_reg] = true;
 
 	return 0;
 }
@@ -30,8 +33,11 @@ static int regmap_ram_read(void *context, unsigned int reg, unsigned int *val)
 {
 	struct regmap_ram_data *data = context;
 
-	*val = data->vals[reg];
-	data->read[reg] = true;
+	if (reg < data->base_reg)
+		return -EINVAL;
+
+	*val = data->vals[reg - data->base_reg];
+	data->read[reg - data->base_reg] = true;
 
 	return 0;
 }
@@ -60,17 +66,25 @@ struct regmap *__regmap_init_ram(struct device *dev,
 				 const char *lock_name)
 {
 	struct regmap *map;
+	unsigned int num_regs;
 
 	if (!config->max_register) {
 		pr_crit("No max_register specified for RAM regmap\n");
 		return ERR_PTR(-EINVAL);
 	}
 
-	data->read = kzalloc_objs(bool, config->max_register + 1);
+	if (data->base_reg > config->max_register) {
+		pr_crit("base_reg above max_register for RAM regmap\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	num_regs = config->max_register - data->base_reg + 1;
+
+	data->read = kzalloc_objs(bool, num_regs);
 	if (!data->read)
 		return ERR_PTR(-ENOMEM);
 
-	data->written = kzalloc_objs(bool, config->max_register + 1);
+	data->written = kzalloc_objs(bool, num_regs);
 	if (!data->written) {
 		kfree(data->read);
 		return ERR_PTR(-ENOMEM);

-- 
2.47.3


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 2/2] regmap: Test rbtree and maple caches for very high register numbers
  2026-08-16 22:13 [PATCH 0/2] regmap: Test caches for regmaps with high bits set in register numbers Mark Brown
  2026-08-16 22:13 ` [PATCH 1/2] regmap: Allow a base register to be specified for the RAM regmap Mark Brown
@ 2026-08-16 22:13 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2026-08-16 22:13 UTC (permalink / raw)
  To: linux-kernel, Mark Brown

We've had bugs in the cache code with handling of register numbers with the
top bit set before, add some test cases for this. It's not really worth
fixing up all the individual tests to support a base address, instead
write a specific test that reproduces a bunch of the coverge. Run this on
the rbtree and maple caches which are the only ones that can reasonably
support this case.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/base/regmap/regmap-kunit.c | 94 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 93 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c
index 2999d9c185d5..98093451a7b4 100644
--- a/drivers/base/regmap/regmap-kunit.c
+++ b/drivers/base/regmap/regmap-kunit.c
@@ -11,6 +11,8 @@
 
 #define BLOCK_TEST_SIZE 12
 
+#define HIGH_BIT_REG (UINT_MAX - 0x5000)
+
 KUNIT_DEFINE_ACTION_WRAPPER(regmap_exit_action, regmap_exit, struct regmap *);
 
 struct regmap_test_priv {
@@ -23,6 +25,7 @@ struct regmap_test_param {
 	enum regcache_type cache;
 	enum regmap_endian val_endian;
 
+	unsigned int base_reg;
 	unsigned int from_reg;
 	bool fast_io;
 };
@@ -204,7 +207,8 @@ static struct regmap *gen_regmap(struct kunit *test,
 			config->max_register += (BLOCK_TEST_SIZE * config->reg_stride);
 	}
 
-	size = array_size(config->max_register + 1, sizeof(*buf));
+	size = array_size(config->max_register - param->base_reg + 1,
+			  sizeof(*buf));
 	buf = kmalloc(size, GFP_KERNEL);
 	if (!buf)
 		return ERR_PTR(-ENOMEM);
@@ -215,6 +219,7 @@ static struct regmap *gen_regmap(struct kunit *test,
 	if (!(*data))
 		goto out_free;
 	(*data)->vals = buf;
+	(*data)->base_reg = param->base_reg;
 
 	if (config->num_reg_defaults) {
 		defaults = kunit_kcalloc(test,
@@ -1648,6 +1653,92 @@ static void cache_write_zero(struct kunit *test)
 	KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, 1));
 }
 
+static const struct regmap_test_param high_bit_cache_types_list[] = {
+	{ .cache = REGCACHE_RBTREE, .from_reg = HIGH_BIT_REG,
+				    .base_reg = HIGH_BIT_REG },
+	{ .cache = REGCACHE_MAPLE,  .from_reg = HIGH_BIT_REG,
+				    .base_reg = HIGH_BIT_REG },
+};
+
+KUNIT_ARRAY_PARAM(high_bit_cache_types, high_bit_cache_types_list, param_to_desc);
+
+/*
+ * Dynamically allocated cache types should support registers with the
+ * high bit set, the backend will return an error for any operation on
+ * a register below the expected window.
+ */
+static void cache_high_bit_reg(struct kunit *test)
+{
+	const struct regmap_test_param *param = test->param_value;
+	struct regmap_ram_data *data;
+	struct regmap_config config;
+	struct regmap *map;
+	unsigned int val[BLOCK_TEST_SIZE], rval;
+	int i;
+
+	config = test_regmap_config;
+
+	map = gen_regmap(test, &config, &data);
+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));
+	if (IS_ERR(map))
+		return;
+
+	get_random_bytes(&val, sizeof(val));
+
+	/* No defaults so no registers cached */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_FALSE(test, regcache_reg_cached(map, param->from_reg + i));
+
+	/* Writes should reach the device */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param->from_reg + i,
+						      val[i]));
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		KUNIT_EXPECT_TRUE(test, data->written[i]);
+		KUNIT_EXPECT_EQ(test, val[i], data->vals[i]);
+	}
+
+	/* Reads should be satisfied from the cache */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		KUNIT_EXPECT_TRUE(test, regcache_reg_cached(map, param->from_reg + i));
+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param->from_reg + i,
+						     &rval));
+		KUNIT_EXPECT_EQ(test, val[i], rval);
+		KUNIT_EXPECT_FALSE(test, data->read[i]);
+	}
+
+	/* Trash the data on the device then resync */
+	regcache_mark_dirty(map);
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		data->vals[i] = 0;
+		data->written[i] = false;
+	}
+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));
+
+	/* Did we just write the correct data out? */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		KUNIT_EXPECT_TRUE(test, data->written[i]);
+		KUNIT_EXPECT_EQ(test, val[i], data->vals[i]);
+	}
+
+	/* Drop some registers */
+	KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, param->from_reg + 3,
+						      param->from_reg + 5));
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, i < 3 || i > 5,
+				regcache_reg_cached(map, param->from_reg + i));
+
+	/* Reread and check only the dropped registers hit the device */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		data->read[i] = false;
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param->from_reg + i,
+						     &rval));
+		KUNIT_EXPECT_EQ(test, val[i], rval);
+		KUNIT_EXPECT_EQ(test, i >= 3 && i <= 5, data->read[i]);
+	}
+}
+
 /* Check that caching the window register works with sync */
 static void cache_range_window_reg(struct kunit *test)
 {
@@ -2168,6 +2259,7 @@ static struct kunit_case regmap_test_cases[] = {
 	KUNIT_CASE_PARAM(cache_drop_all_and_sync_has_defaults, sparse_cache_types_gen_params),
 	KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params),
 	KUNIT_CASE_PARAM(cache_write_zero, sparse_cache_types_gen_params),
+	KUNIT_CASE_PARAM(cache_high_bit_reg, high_bit_cache_types_gen_params),
 	KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_only_gen_params),
 
 	KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params),

-- 
2.47.3


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2026-08-16 22:13 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-08-16 22:13 [PATCH 0/2] regmap: Test caches for regmaps with high bits set in register numbers Mark Brown
2026-08-16 22:13 ` [PATCH 1/2] regmap: Allow a base register to be specified for the RAM regmap Mark Brown
2026-08-16 22:13 ` [PATCH 2/2] regmap: Test rbtree and maple caches for very high register numbers Mark Brown

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