* [PATCH 1/2] dt-bindings: gpio: Add compatible string for Tegra268
2026-08-28 14:39 [PATCH 0/2] gpio: tegra186: Add support for Tegra268 Jon Hunter
@ 2026-08-28 14:39 ` Jon Hunter
2026-08-28 16:22 ` Conor Dooley
2026-08-28 14:39 ` [PATCH 2/2] gpio: tegra186: Add support " Jon Hunter
1 sibling, 1 reply; 4+ messages in thread
From: Jon Hunter @ 2026-08-28 14:39 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Thierry Reding
Cc: Thierry Reding, linux-gpio, devicetree, linux-tegra,
Thierry Reding, linux-kernel, Jon Hunter
Add compatible strings for the GPIO controllers on the Tegra268 device.
The Tegra268 device has the same GPIO controllers as Tegra264, but only
has a subset of the pins and hence, GPIOs.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
index adeb3b3a2902..fac53e65909b 100644
--- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
@@ -91,6 +91,9 @@ properties:
- nvidia,tegra264-gpio
- nvidia,tegra264-gpio-uphy
- nvidia,tegra264-gpio-aon
+ - nvidia,tegra268-gpio
+ - nvidia,tegra268-gpio-uphy
+ - nvidia,tegra268-gpio-aon
reg-names:
items:
@@ -169,6 +172,8 @@ allOf:
- nvidia,tegra256-gpio
- nvidia,tegra264-gpio
- nvidia,tegra264-gpio-uphy
+ - nvidia,tegra268-gpio
+ - nvidia,tegra268-gpio-uphy
then:
properties:
interrupts:
@@ -185,6 +190,7 @@ allOf:
- nvidia,tegra234-gpio-aon
- nvidia,tegra238-gpio-aon
- nvidia,tegra264-gpio-aon
+ - nvidia,tegra268-gpio-aon
then:
properties:
interrupts:
@@ -201,6 +207,9 @@ allOf:
- nvidia,tegra264-gpio
- nvidia,tegra264-gpio-uphy
- nvidia,tegra264-gpio-aon
+ - nvidia,tegra268-gpio
+ - nvidia,tegra268-gpio-uphy
+ - nvidia,tegra268-gpio-aon
then:
required:
- wakeup-parent
--
2.43.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/2] gpio: tegra186: Add support for Tegra268
2026-08-28 14:39 [PATCH 0/2] gpio: tegra186: Add support for Tegra268 Jon Hunter
2026-08-28 14:39 ` [PATCH 1/2] dt-bindings: gpio: Add compatible string " Jon Hunter
@ 2026-08-28 14:39 ` Jon Hunter
1 sibling, 0 replies; 4+ messages in thread
From: Jon Hunter @ 2026-08-28 14:39 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Thierry Reding
Cc: Thierry Reding, linux-gpio, devicetree, linux-tegra,
Thierry Reding, linux-kernel, Jon Hunter
Add support for the 3 GPIO controllers, main, AON and UPHY, that are
present on the Tegra268 device. Tegra268 has the same 3 GPIO controllers
as Tegra264, but a subset of the GPIOs. Therefore, we can re-use the
Tegra264 device-tree port definitions for Tegra268 and avoid duplicating
these.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/gpio/gpio-tegra186.c | 74 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c
index d9a2dedf50ea..34e084c95d7a 100644
--- a/drivers/gpio/gpio-tegra186.c
+++ b/drivers/gpio/gpio-tegra186.c
@@ -1419,6 +1419,71 @@ static const struct tegra_gpio_soc tegra264_uphy_soc = {
.has_vm_support = true,
};
+static const struct tegra_gpio_port tegra268_main_ports[] = {
+ TEGRA264_MAIN_GPIO_PORT(F, 3, 0, 8),
+ TEGRA264_MAIN_GPIO_PORT(G, 3, 1, 5),
+ TEGRA264_MAIN_GPIO_PORT(H, 1, 0, 8),
+ TEGRA264_MAIN_GPIO_PORT(J, 1, 1, 8),
+ TEGRA264_MAIN_GPIO_PORT(K, 1, 2, 8),
+ TEGRA264_MAIN_GPIO_PORT(L, 1, 3, 8),
+ TEGRA264_MAIN_GPIO_PORT(M, 1, 4, 2),
+ TEGRA264_MAIN_GPIO_PORT(P, 2, 0, 8),
+ TEGRA264_MAIN_GPIO_PORT(Q, 2, 1, 8),
+ TEGRA264_MAIN_GPIO_PORT(R, 2, 2, 8),
+ TEGRA264_MAIN_GPIO_PORT(S, 2, 3, 2),
+ TEGRA264_MAIN_GPIO_PORT(T, 0, 0, 7),
+ TEGRA264_MAIN_GPIO_PORT(U, 0, 1, 8),
+ TEGRA264_MAIN_GPIO_PORT(V, 0, 2, 8),
+ TEGRA264_MAIN_GPIO_PORT(W, 0, 3, 8),
+ TEGRA264_MAIN_GPIO_PORT(Y, 0, 5, 8),
+ TEGRA264_MAIN_GPIO_PORT(Z, 0, 6, 8),
+ TEGRA264_MAIN_GPIO_PORT(AL, 0, 4, 3),
+};
+
+static const struct tegra_gpio_soc tegra268_main_soc = {
+ .num_ports = ARRAY_SIZE(tegra268_main_ports),
+ .ports = tegra268_main_ports,
+ .name = "tegra268-gpio",
+ .instance = 0,
+ .num_irqs_per_bank = 8,
+ .has_vm_support = true,
+};
+
+static const struct tegra_gpio_port tegra268_aon_ports[] = {
+ TEGRA264_AON_GPIO_PORT(AA, 0, 0, 8),
+ TEGRA264_AON_GPIO_PORT(BB, 0, 1, 2),
+ TEGRA264_AON_GPIO_PORT(CC, 0, 2, 8),
+ TEGRA264_AON_GPIO_PORT(DD, 0, 3, 8),
+ TEGRA264_AON_GPIO_PORT(EE, 0, 4, 2)
+};
+
+static const struct tegra_gpio_soc tegra268_aon_soc = {
+ .num_ports = ARRAY_SIZE(tegra268_aon_ports),
+ .ports = tegra268_aon_ports,
+ .name = "tegra268-gpio-aon",
+ .instance = 1,
+ .num_irqs_per_bank = 8,
+ .has_gte = true,
+ .has_vm_support = true,
+};
+
+static const struct tegra_gpio_port tegra268_uphy_ports[] = {
+ TEGRA264_UPHY_GPIO_PORT(A, 0, 0, 6),
+ TEGRA264_UPHY_GPIO_PORT(B, 0, 1, 8),
+ TEGRA264_UPHY_GPIO_PORT(C, 0, 2, 3),
+ TEGRA264_UPHY_GPIO_PORT(D, 1, 0, 6),
+ TEGRA264_UPHY_GPIO_PORT(E, 1, 1, 4),
+};
+
+static const struct tegra_gpio_soc tegra268_uphy_soc = {
+ .num_ports = ARRAY_SIZE(tegra268_uphy_ports),
+ .ports = tegra268_uphy_ports,
+ .name = "tegra268-gpio-uphy",
+ .instance = 2,
+ .num_irqs_per_bank = 8,
+ .has_vm_support = true,
+};
+
#define TEGRA256_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \
TEGRA_GPIO_PORT(TEGRA256_MAIN, _name, _bank, _port, _pins)
@@ -1528,6 +1593,15 @@ static const struct of_device_id tegra186_gpio_of_match[] = {
}, {
.compatible = "nvidia,tegra264-gpio-uphy",
.data = &tegra264_uphy_soc
+ }, {
+ .compatible = "nvidia,tegra268-gpio",
+ .data = &tegra268_main_soc
+ }, {
+ .compatible = "nvidia,tegra268-gpio-aon",
+ .data = &tegra268_aon_soc
+ }, {
+ .compatible = "nvidia,tegra268-gpio-uphy",
+ .data = &tegra268_uphy_soc
}, {
/* sentinel */
}
--
2.43.0
^ permalink raw reply [flat|nested] 4+ messages in thread