From: Alex Williamson <alex@shazbot.org>
To: Srirangan Madhavan <smadhavan@nvidia.com>
Cc: alex@shazbot.org, Alison Schofield <alison.schofield@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Ira Weiny <ira.weiny@intel.com>,
Jonathan Cameron <jic23@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Alex Williamson <alex.williamson@redhat.com>,
vsethi@nvidia.com,
Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
Vishal Aslot <vaslot@nvidia.com>,
Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
Richard Cheng <icheng@nvidia.com>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices
Date: Wed, 9 Sep 2026 15:13:09 -0600 [thread overview]
Message-ID: <20260909151309.7e1883b9@shazbot.org> (raw)
In-Reply-To: <20260902072804.665639-1-smadhavan@nvidia.com>
On Wed, 2 Sep 2026 07:27:52 +0000
Srirangan Madhavan <smadhavan@nvidia.com> wrote:
> Hi folks!
>
> This series adds CXL Reset support for CXL Type 2 devices through the
> existing PCI reset_method ABI. The reset sequence follows the CXL 4.0
> specification [1], including CXL.cache disable, optional cache
> writeback, CXL Reset initiation, ResetComplete polling, and ResetError
> reporting.
>
> The userspace ABI is the existing PCI reset interface:
>
> /sys/bus/pci/devices/.../reset_method
> /sys/bus/pci/devices/.../reset
>
> Userspace can select "cxl_reset" in reset_method and then trigger reset
> through the existing reset attribute.
>
> CXL Reset is exposed conservatively. The target must be a
> single-function CXL Type 2 device with CXL.cache and CXL.mem enabled,
> and the kernel must have cached HDM state sufficient to validate affected
> ranges and restore decoder programming. The reset preserves device
> memory; it does not request CXL Reset Memory Clear.
How does this provide multi-tenancy then? vfio-pci considers the
device to be scrubbed of tenant data after a pci_reset_function() and
I don't think Manish's series alters that. Thanks,
Alex
next prev parent reply other threads:[~2026-09-09 21:13 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 7:27 Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 01/12] cxl: Move HDM decoder programming helpers Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 02/12] cxl: Make HDM commit helpers available to reset code Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 03/12] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 04/12] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 05/12] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-09-02 14:03 ` Li Ming
2026-09-10 0:07 ` Srirangan Madhavan
2026-09-10 2:21 ` Li Ming
2026-09-10 7:17 ` Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 06/12] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 07/12] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-09-04 9:19 ` Richard Cheng
2026-09-10 0:10 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 08/12] PCI/CXL: Reject CXL Reset on multifunction devices Srirangan Madhavan
2026-09-04 9:26 ` Richard Cheng
2026-09-10 0:15 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 09/12] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-09-04 9:23 ` Richard Cheng
2026-09-10 0:18 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 10/12] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 11/12] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 12/12] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-09-04 9:15 ` [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices Richard Cheng
2026-09-10 0:56 ` Srirangan Madhavan
2026-09-09 21:13 ` Alex Williamson [this message]
2026-09-10 1:01 ` Srirangan Madhavan
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