From: Srirangan Madhavan <smadhavan@nvidia.com>
To: Li Ming <ming.li@zohomail.com>,
Alison Schofield <alison.schofield@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Dan Williams <djbw@kernel.org>, Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Ira Weiny <ira.weiny@intel.com>,
Jonathan Cameron <jic23@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Alex Williamson <alex.williamson@redhat.com>,
vsethi@nvidia.com, alwilliamson@nvidia.com,
Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
Vishal Aslot <vaslot@nvidia.com>,
Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
Richard Cheng <icheng@nvidia.com>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v11 05/12] cxl: Cache endpoint decoder settings during PCI enumeration
Date: Wed, 9 Sep 2026 17:07:53 -0700 [thread overview]
Message-ID: <58a876a1-7569-49d9-94bb-d090c8acd439@nvidia.com> (raw)
In-Reply-To: <08d97766-d62d-4901-a413-705df0020d22@zohomail.com>
On 9/2/26 7:03 AM, Li Ming wrote:
>> + return true;
>> +
>> + pci_cxl_hdm_init(pdev);
>
> I forgot to ask a question in v10, sorry about that.
>
> I am wondering why calling pci_cxl_hdm_init() in
> cxl_pci_hdm_decoder_count_match() is needed. pci_bus_add_device()
> already does pci_cxl_hdm_init(), so if my understanding is correct,
> pdev->hdm is not NULL here, so this pci_cxl_hdm_init() here will not do
> anything except checking if pdev->hdm is NULL. I am not sure if I miss
> some cases for that.
Hi Li Ming!
Your question is valid. pci_bus_add_device() is the normal
initialization path. The later call is a retry for cases where that
attempt did not publish pdev->hdm, for example because allocation or
MMIO mapping failed at that point.
If initialization succeeded earlier, the existing cache is detected and
the retry returns without rebuilding it. I clarified this behavior in
the v12 commit message.
--
Regards,
Srirangan
next prev parent reply other threads:[~2026-09-10 0:08 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 7:27 [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 01/12] cxl: Move HDM decoder programming helpers Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 02/12] cxl: Make HDM commit helpers available to reset code Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 03/12] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 04/12] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 05/12] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-09-02 14:03 ` Li Ming
2026-09-10 0:07 ` Srirangan Madhavan [this message]
2026-09-10 2:21 ` Li Ming
2026-09-10 7:17 ` Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 06/12] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 07/12] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-09-04 9:19 ` Richard Cheng
2026-09-10 0:10 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 08/12] PCI/CXL: Reject CXL Reset on multifunction devices Srirangan Madhavan
2026-09-04 9:26 ` Richard Cheng
2026-09-10 0:15 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 09/12] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-09-04 9:23 ` Richard Cheng
2026-09-10 0:18 ` Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 10/12] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 11/12] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-09-02 7:28 ` [PATCH v11 12/12] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-09-04 9:15 ` [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices Richard Cheng
2026-09-10 0:56 ` Srirangan Madhavan
2026-09-09 21:13 ` Alex Williamson
2026-09-10 1:01 ` Srirangan Madhavan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=58a876a1-7569-49d9-94bb-d090c8acd439@nvidia.com \
--to=smadhavan@nvidia.com \
--cc=alex.williamson@redhat.com \
--cc=alison.schofield@intel.com \
--cc=alwilliamson@nvidia.com \
--cc=bhelgaas@google.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=djbw@kernel.org \
--cc=icheng@nvidia.com \
--cc=ira.weiny@intel.com \
--cc=jan@nvidia.com \
--cc=jic23@kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mhonap@nvidia.com \
--cc=ming.li@zohomail.com \
--cc=skancherla@nvidia.com \
--cc=vaslot@nvidia.com \
--cc=vishal.l.verma@intel.com \
--cc=vsethi@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®