[PATCH v5 09/17] x86/msr: Introduce sync_cpu_after_wrmsrns()

[Juergen Gross <jgross@suse.com>]

In order to allow using wrmsrns() for multiple MSR register writes
introduce sync_cpu_after_wrmsrns() which will then do a CPU serialize
operation, if the hardware does support the WRMSRNS instruction. In
case the hardware doesn't support WRMSRNS, sync_cpu_after_wrmsrns()
will be a NOP.

Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
---
V4:
- new patch
---
 arch/x86/include/asm/msr.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 91d6f481732b..6ae8a49f9c07 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/types.h>
 #include <linux/percpu.h>
+#include <asm/special_insns.h>
 
 struct msr_info {
 	u32			msr_no;
@@ -362,6 +363,12 @@ static __always_inline int wrmsrns_safe(u32 msr, u64 val)
 	return err;
 }
 
+static __always_inline void sync_cpu_after_wrmsrns(void)
+{
+	if (cpu_feature_enabled(X86_FEATURE_WRMSRNS))
+		serialize();
+}
+
 struct msr __percpu *msrs_alloc(void);
 void msrs_free(struct msr __percpu *msrs);
 int msr_set_bit(u32 msr, u8 bit);
-- 
2.55.0