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From: Juergen Gross <jgross@suse.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: Juergen Gross <jgross@suse.com>,
	Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Xin Li (Intel)" <xin@zytor.com>
Subject: [PATCH v5 10/17] x86/msr: Use the alternatives mechanism for RDMSR
Date: Fri, 11 Sep 2026 10:42:04 +0200	[thread overview]
Message-ID: <20260911084211.3149957-11-jgross@suse.com> (raw)
In-Reply-To: <20260911084211.3149957-1-jgross@suse.com>

When available use the immediate variant of RDMSR in __rdmsr().

For the safe/unsafe variants make __rdmsr() to be a common base
function instead of duplicating the ALTERNATIVE*() macros.

Modify native_rdmsr() and native_read_msr() to use native_rdmsrq().

The paravirt case will be handled later.

Originally-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
---
V2:
- new patch, partially taken from "[RFC PATCH v2 22/34] x86/msr: Utilize
  the alternatives mechanism to read MSR" by Xin Li
---
 arch/x86/include/asm/msr.h | 106 +++++++++++++++++++++++++++++--------
 1 file changed, 84 insertions(+), 22 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 6ae8a49f9c07..fb1027dc7f64 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -66,6 +66,8 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 
 /* The GNU Assembler (Gas) with Binutils 2.41 adds the .insn directive support */
 #if defined(CONFIG_AS_IS_GNU) && CONFIG_AS_VERSION >= 24100
+#define ASM_RDMSR_IMM				\
+	" .insn VEX.128.F2.M7.W0 0xf6 /0, %[msr]%{:u32}, %[val]\n\t"
 #define ASM_WRMSRNS_IMM				\
 	" .insn VEX.128.F3.M7.W0 0xf6 /0, %[val], %[msr]%{:u32}\n\t"
 #else
@@ -75,10 +77,17 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
  * The register operand is encoded as %rax because all uses of the immediate
  * form MSR access instructions reference %rax as the register operand.
  */
+#define ASM_RDMSR_IMM				\
+	" .byte 0xc4,0xe7,0x7b,0xf6,0xc0; .long %c[msr]"
 #define ASM_WRMSRNS_IMM				\
 	" .byte 0xc4,0xe7,0x7a,0xf6,0xc0; .long %c[msr]"
 #endif
 
+#define RDMSR_AND_SAVE_RESULT			\
+	"rdmsr\n\t"				\
+	"shl $0x20, %%rdx\n\t"			\
+	"or %%rdx, %%rax\n\t"
+
 #define PREPARE_RDX_FOR_WRMSR			\
 	"mov %%rax, %%rdx\n\t"			\
 	"shr $0x20, %%rdx\n\t"
@@ -94,16 +103,76 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
  * think of extending them - you will be slapped with a stinking trout or a frozen
  * shark will reach you, wherever you are! You've been warned.
  */
-static __always_inline u64 __rdmsr(u32 msr)
+static __always_inline bool __rdmsrq_variable(u32 msr, u64 *val, int type)
+ {
+#ifdef CONFIG_X86_64
+	BUILD_BUG_ON(__builtin_constant_p(msr));
+
+	asm_inline volatile goto(
+		"1:\n"
+		RDMSR_AND_SAVE_RESULT
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR */
+
+		: [val] "=a" (*val)
+		: "c" (msr), [type] "i" (type)
+		: "rdx"
+		: badmsr);
+#else
+	asm_inline volatile goto(
+		"1: rdmsr\n\t"
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR */
+
+		: "=A" (*val)
+		: "c" (msr), [type] "i" (type)
+		:
+		: badmsr);
+#endif
+
+	return false;
+
+badmsr:
+	*val = 0;
+
+	return true;
+}
+
+#ifdef CONFIG_X86_64
+static __always_inline bool __rdmsrq_constant(u32 msr, u64 *val, int type)
 {
-	EAX_EDX_DECLARE_ARGS(val, low, high);
+	BUILD_BUG_ON(!__builtin_constant_p(msr));
 
-	asm volatile("1: rdmsr\n"
-		     "2:\n"
-		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_RDMSR)
-		     : EAX_EDX_RET(val, low, high) : "c" (msr));
+	asm_inline volatile goto(
+		"1:\n"
+		ALTERNATIVE("mov %[msr], %%ecx\n\t"
+			    "2:\n"
+			    RDMSR_AND_SAVE_RESULT,
+			    ASM_RDMSR_IMM,
+			    X86_FEATURE_MSR_IMM)
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR immediate */
+		_ASM_EXTABLE_TYPE(2b, %l[badmsr], %c[type])	/* For RDMSR */
+
+		: [val] "=a" (*val)
+		: [msr] "i" (msr), [type] "i" (type)
+		: "ecx", "rdx"
+		: badmsr);
 
-	return EAX_EDX_VAL(val, low, high);
+	return false;
+
+badmsr:
+	*val = 0;
+
+	return true;
+}
+#endif
+
+static __always_inline bool __rdmsr(u32 msr, u64 *val, int type)
+{
+#ifdef CONFIG_X86_64
+	if (__builtin_constant_p(msr))
+		return __rdmsrq_constant(msr, val, type);
+#endif
+
+	return __rdmsrq_variable(msr, val, type);
 }
 
 static __always_inline void __wrmsrq(u32 msr, u64 val)
@@ -188,7 +257,11 @@ static __always_inline bool __wrmsrns(u32 msr, u64 val, int type)
 
 static __always_inline u64 native_rdmsrq(u32 msr)
 {
-	return __rdmsr(msr);
+	u64 val;
+
+	__rdmsr(msr, &val, EX_TYPE_RDMSR);
+
+	return val;
 }
 
 static __always_inline void native_wrmsrq(u32 msr, u64 val)
@@ -198,23 +271,12 @@ static __always_inline void native_wrmsrq(u32 msr, u64 val)
 
 static inline u64 native_read_msr(u32 msr)
 {
-	return __rdmsr(msr);
+	return native_rdmsrq(msr);
 }
 
-static inline int native_read_msr_safe(u32 msr, u64 *p)
+static inline int native_read_msr_safe(u32 msr, u64 *val)
 {
-	int err;
-	EAX_EDX_DECLARE_ARGS(val, low, high);
-
-	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
-		     "2:\n\t"
-		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
-		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
-		     : "c" (msr));
-
-	*p = EAX_EDX_VAL(val, low, high);
-
-	return err;
+	return __rdmsr(msr, val, EX_TYPE_RDMSR_SAFE) ? -EIO : 0;
 }
 
 /* Can be uninlined because referenced by paravirt */
-- 
2.55.0


  parent reply	other threads:[~2026-09-11  8:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-11  8:41 [PATCH v5 00/17] x86/msr: Inline rdmsr/wrmsr instructions Juergen Gross
2026-09-11  8:41 ` [PATCH v5 01/17] x86/alternative: Support alt_replace_call() with instructions after call Juergen Gross
2026-09-11  8:41 ` [PATCH v5 02/17] coco/tdx: Rename MSR access helpers Juergen Gross
2026-09-11  8:41 ` [PATCH v5 03/17] x86/msr: Minimize usage of native_*() msr access functions Juergen Gross
2026-09-11  8:41 ` [PATCH v5 04/17] x86/msr: Move MSR trace calls one function level up Juergen Gross
2026-09-23 20:26   ` Shreshth Srivastava
2026-09-25 13:15     ` Jürgen Groß
2026-09-11  8:41 ` [PATCH v5 05/17] x86/hyperv: Switch from __rdmsr() to native_rdmsrq() Juergen Gross
2026-09-11  8:42 ` [PATCH v5 06/17] x86/opcode: Add immediate form MSR instructions Juergen Gross
2026-09-11  8:42 ` [PATCH v5 07/17] x86/extable: Add support for " Juergen Gross
2026-09-11  8:42 ` [PATCH v5 08/17] x86/msr: Make wrmsrns() a first class citizen Juergen Gross
2026-09-11  8:42 ` [PATCH v5 09/17] x86/msr: Introduce sync_cpu_after_wrmsrns() Juergen Gross
2026-09-11  8:42 ` Juergen Gross [this message]
2026-09-11  8:42 ` [PATCH v5 11/17] x86/alternatives: Add ALTERNATIVE_4() Juergen Gross
2026-09-11  8:42 ` [PATCH v5 12/17] x86/paravirt: Split off MSR related hooks into new header Juergen Gross
2026-09-11  8:42 ` [PATCH v5 13/17] x86/paravirt: Prepare support of MSR instruction interfaces Juergen Gross
2026-09-11  8:42 ` [PATCH v5 14/17] x86/paravirt: Switch MSR access pv_ops functions to " Juergen Gross
2026-09-11  8:42 ` [PATCH v5 15/17] x86/msr: Reduce number of low level MSR access helpers Juergen Gross
2026-09-11  8:42 ` [PATCH v5 16/17] x86/paravirt: Use alternatives for MSR access with paravirt Juergen Gross
2026-09-11  8:42 ` [PATCH v5 17/17] x86/msr: Make all MSR access functions __always_inline Juergen Gross
2026-09-23 19:36 ` [PATCH v5 00/17] x86/msr: Inline rdmsr/wrmsr instructions Shreshth Srivastava
2026-09-23 20:15   ` Nick Desaulniers
2026-09-25 10:25   ` Jürgen Groß

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