From: Shehryar Ahmad <shehryar.amd@gmail.com>
To: jic23@kernel.org
Cc: nuno.sa@analog.com, Michael.Hennerich@analog.com,
dlechner@baylibre.com, andy@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
gregkh@linuxfoundation.org, linux@analog.com,
linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-staging@lists.linux.dev, devicetree@vger.kernel.org,
Shehryar Ahmad <shehryar.amd@gmail.com>
Subject: [PATCH v2 3/6] iio: accel: adis16201: prepare driver to support additional parts
Date: Sun, 13 Sep 2026 13:53:04 +0500 [thread overview]
Message-ID: <20260913085307.13846-4-shehryar.amd@gmail.com> (raw)
In-Reply-To: <20260913085307.13846-1-shehryar.amd@gmail.com>
Introduce adis16201_chip_info to hold per chip data and adis16201_state
to wrap struct adis. Move adis16201 to this infrastructure. This
prepares the driver to support additional chip variants by keeping
chip-specific parameters in adis16201_chip_info. Additionally,
adis16201_write_raw applies mask directly on value.
Signed-off-by: Shehryar Ahmad <shehryar.amd@gmail.com>
---
drivers/iio/accel/adis16201.c | 78 ++++++++++++++++++++++++-----------
1 file changed, 55 insertions(+), 23 deletions(-)
diff --git a/drivers/iio/accel/adis16201.c b/drivers/iio/accel/adis16201.c
index 2ce5c409b..e0bf7df50 100644
--- a/drivers/iio/accel/adis16201.c
+++ b/drivers/iio/accel/adis16201.c
@@ -87,6 +87,22 @@ enum adis16201_scan {
ADIS16201_SCAN_TEMP,
};
+struct adis16201_chip_info {
+ const char *name;
+ const struct iio_chan_spec *arr_channels;
+ unsigned int incli_scale_val2;
+ u16 write_mask_incli;
+ u16 diag_stat_mask;
+ unsigned int read_bits_incli;
+ unsigned int num_channels;
+};
+
+struct adis16201_state {
+ struct adis adis;
+ const struct adis16201_chip_info *info;
+ struct adis_data data;
+};
+
static const u8 adis16201_addresses[] = {
[ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS_REG,
[ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS_REG,
@@ -99,7 +115,7 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
int *val, int *val2,
long mask)
{
- struct adis *st = iio_priv(indio_dev);
+ struct adis16201_state *st = iio_priv(indio_dev);
int ret;
int bits;
u8 addr;
@@ -137,7 +153,7 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
return IIO_VAL_INT_PLUS_NANO;
case IIO_INCLI:
*val = 0;
- *val2 = 100000;
+ *val2 = st->info->incli_scale_val2;
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
@@ -157,13 +173,13 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
bits = 12;
break;
case IIO_INCLI:
- bits = 9;
+ bits = st->info->read_bits_incli;
break;
default:
return -EINVAL;
}
addr = adis16201_addresses[chan->scan_index];
- ret = adis_read_reg_16(st, addr, &val16);
+ ret = adis_read_reg_16(&st->adis, addr, &val16);
if (ret)
return ret;
@@ -180,25 +196,24 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
int val2,
long mask)
{
- struct adis *st = iio_priv(indio_dev);
- int m;
+ struct adis16201_state *st = iio_priv(indio_dev);
if (mask != IIO_CHAN_INFO_CALIBBIAS)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
- m = GENMASK(11, 0);
+ val &= GENMASK(11, 0);
break;
case IIO_INCLI:
- m = GENMASK(8, 0);
+ val &= st->info->write_mask_incli;
break;
default:
return -EINVAL;
}
- return adis_write_reg_16(st, adis16201_addresses[chan->scan_index],
- val & m);
+ return adis_write_reg_16(&st->adis, adis16201_addresses[chan->scan_index],
+ val);
}
static const struct iio_chan_spec adis16201_channels[] = {
@@ -217,6 +232,20 @@ static const struct iio_chan_spec adis16201_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(7)
};
+static const struct adis16201_chip_info adis16201_chip_data = {
+ .arr_channels = adis16201_channels,
+ .incli_scale_val2 = 100000,
+ .write_mask_incli = GENMASK(8, 0),
+ .diag_stat_mask =
+ BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
+ BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
+ BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
+ BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
+ .read_bits_incli = 9,
+ .num_channels = ARRAY_SIZE(adis16201_channels),
+ .name = "adis16201",
+};
+
static const struct iio_info adis16201_info = {
.read_raw = adis16201_read_raw,
.write_raw = adis16201_write_raw,
@@ -248,16 +277,12 @@ static const struct adis_data adis16201_data = {
.timeouts = &adis16201_timeouts,
.status_error_msgs = adis16201_status_error_msgs,
- .status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
- BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
- BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
- BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
};
static int adis16201_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
- struct adis *st;
+ struct adis16201_state *st;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
@@ -266,22 +291,29 @@ static int adis16201_probe(struct spi_device *spi)
st = iio_priv(indio_dev);
- indio_dev->name = spi->dev.driver->name;
+ st->info = spi_get_device_match_data(spi);
+ if (!st->info)
+ return -ENODATA;
+
+ indio_dev->name = st->info->name;
indio_dev->info = &adis16201_info;
- indio_dev->channels = adis16201_channels;
- indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
+ indio_dev->channels = st->info->arr_channels;
+ indio_dev->num_channels = st->info->num_channels;
indio_dev->modes = INDIO_DIRECT_MODE;
- ret = adis_init(st, indio_dev, spi, &adis16201_data);
+ st->data = adis16201_data;
+ st->data.status_error_mask = st->info->diag_stat_mask;
+
+ ret = adis_init(&st->adis, indio_dev, spi, &st->data);
if (ret)
return ret;
- ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
+ ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
if (ret)
return ret;
- ret = __adis_initial_startup(st);
+ ret = __adis_initial_startup(&st->adis);
if (ret)
return ret;
@@ -289,14 +321,14 @@ static int adis16201_probe(struct spi_device *spi)
}
static const struct of_device_id adis16201_of_match[] = {
- { .compatible = "adi,adis16201" },
+ { .compatible = "adi,adis16201", .data = &adis16201_chip_data },
{ },
};
MODULE_DEVICE_TABLE(of, adis16201_of_match);
static const struct spi_device_id adis16201_ids[] = {
- { .name = "adis16201", 0 },
+ { .name = "adis16201", .driver_data = (kernel_ulong_t)&adis16201_chip_data },
{ },
};
--
2.43.0
next prev parent reply other threads:[~2026-09-13 8:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-13 8:53 [PATCH v2 0/6] iio: accel: merge adis16203 into mainline adis16201 and remove from staging Shehryar Ahmad
2026-09-13 8:53 ` [PATCH v2 1/6] iio: accel: adis16201: add SPI device ID table Shehryar Ahmad
2026-09-13 8:53 ` [PATCH v2 2/6] iio: accel: adis16201: add OF " Shehryar Ahmad
2026-09-13 8:53 ` Shehryar Ahmad [this message]
2026-09-13 8:53 ` [PATCH v2 4/6] iio: accel: adis16201: add ADIS16203 support Shehryar Ahmad
2026-09-13 8:53 ` [PATCH v2 5/6] staging: iio: accel: remove adis16203, merged into mainline adis16201 driver Shehryar Ahmad
2026-09-13 8:53 ` [PATCH v2 6/6] dt-bindings: iio: accel: adi,adis16201: add adis16203 compatible Shehryar Ahmad
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