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From: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <jgg@nvidia.com>,
	<joro@8bytes.org>, <bhelgaas@google.com>, <praan@google.com>,
	<kevin.tian@intel.com>, <kees@kernel.org>, <smostafa@google.com>,
	<baolu.lu@linux.intel.com>,
	Jean-Philippe Brucker <jpb@kernel.org>,
	"Eric Auger" <eric.auger@redhat.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<skaestle@nvidia.com>, <mmarrid@nvidia.com>,
	<skolothumtho@nvidia.com>, <bbiber@nvidia.com>,
	<harsha.v@oss.qualcomm.com>
Subject: Re: [PATCH v4 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr()
Date: Mon, 14 Sep 2026 14:10:49 -0700	[thread overview]
Message-ID: <20260914141049.000077cf@oss.qualcomm.com> (raw)
In-Reply-To: <aqSLsg7AVgqusKob@nvidia.com>

On Fri, 11 Sep 2026 16:16:02 -0700
Nicolin Chen <nicolinc@nvidia.com> wrote:

> On Thu, Sep 10, 2026 at 05:14:05PM -0700, Jonathan Cameron wrote:
> > > @@ -2380,9 +2381,47 @@ static void arm_smmu_handle_ppr(struct arm_smmu_device *smmu, u64 *evt)
> > >  	last = FIELD_GET(PRIQ_0_PRG_LAST, evt[0]);
> > >  	grpid = FIELD_GET(PRIQ_1_PRG_IDX, evt[1]);
> > >  
> > > -	dev_info(smmu->dev, "unexpected PRI request received:\n");
> > > -	dev_info(smmu->dev,
> > > -		 "\tsid 0x%08x.0x%05x: [%u%s] %sprivileged %s%s%s access at iova 0x%016llx\n",
> > > +	/*
> > > +	 * A PASID Stop Marker (LRW = 0b100) does not expect a response and
> > > +	 * must be discarded before fault reporting: see the documentation
> > > +	 * at iommu_report_device_fault().
> > > +	 */
> > > +	if (last && !(evt[0] & (PRIQ_0_PERM_READ | PRIQ_0_PERM_WRITE)))  
> > 
> > There is a bit of spec language about case where there is no PASID
> > LWR=0xb100 not being a stop marker, SSV == 0 and should be treated as
> > a PRI request. I'm not sure what that means in practice but maybe
> > a comment on why that case doesn't matter. Feels like breadcrumbs we
> > might need in future.  
> 
> That's a sharp one! I didn't find any the practical action was
> suggested either.
> 
> I wonder if we should let it fall through instead of a return:
> 
> 	/*
> 	 * A PASID Stop Marker (LRW = 0b100) does not expect a response and
> 	 * must be discarded before fault reporting: see the documentation
> 	 * at iommu_report_device_fault().
> 	 *
> 	 * Gate it on SSV, as without a PASID that same encoding is a PRI Page
> 	 * Request and it does expect a response. So let it fall through and be
> 	 * answered with a PRI_RESP_FAIL, since iommu_sva_handle_mm() rejects a
> 	 * PASID-less fault, or by the PRI_RESP_DENY issued below.
> 	 */
> 	if (last && ssv && !(evt[0] & (PRIQ_0_PERM_READ | PRIQ_0_PERM_WRITE)))
> 		return;
> 
> Thanks
> Nicolin
Works for me.

J


  reply	other threads:[~2026-09-14 21:10 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-10 23:16 [PATCH v4 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-11 23:17     ` Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-10 23:16 ` [PATCH v4 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-10 23:16 ` [PATCH v4 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-11 23:16     ` Nicolin Chen
2026-09-14 21:10       ` Jonathan Cameron [this message]
2026-09-10 23:17 ` [PATCH v4 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron
2026-09-10 23:17 ` [PATCH v4 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-10 23:17 ` [PATCH v4 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-09-11  0:14   ` Jonathan Cameron

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