[PATCH v5 04/27] cxl: Add cxl_reset_dvsec_sequence() for vfio-pci

[<mhonap@nvidia.com>]

From: Manish Honap <mhonap@nvidia.com>

vfio-pci needs to run a CXL reset on a passed-through Type-2 device
without the host-memory handling in cxl_reset_function(): the memory
behind the decoder belongs to the guest, so the HDM range collection and
host CPU cache flush that the host path performs must be skipped.

Add cxl_reset_dvsec_sequence(), which runs the DVSEC reset under the
device lock and restores HDM state through
cxl_restore_state_after_pci_reset(), and cxl_reset_capable() to gate it on
a function-scoped reset. Both are exported to the vfio-cxl module so
vfio-pci core does not import the CXL namespace.

CXL Reset always clears memory, so there is no caller Memory Clear choice.

Assisted-by: LLM
Signed-off-by: Manish Honap <mhonap@nvidia.com>
---
 drivers/cxl/core/resource.c | 53 +++++++++++++++++++++++++++++++++++++
 include/cxl/cxl.h           | 12 +++++++++
 2 files changed, 65 insertions(+)

diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c
index d3491e20c1ca..d373df9aa127 100644
--- a/drivers/cxl/core/resource.c
+++ b/drivers/cxl/core/resource.c
@@ -1398,3 +1398,56 @@ int cxl_reset_function(struct pci_dev *pdev, bool probe)
 	cxl_pci_target_reset_done(pdev, &target_prepared);
 	return rc;
 }
+
+/* True when a function-scoped CXL reset is available for @pdev. */
+bool cxl_reset_capable(struct pci_dev *pdev)
+{
+	u16 cap;
+
+	if (cxl_reset_get_dvsec(pdev, &cap) < 0)
+		return false;
+
+	if (pdev->multifunction || pci_num_vf(pdev))
+		return false;
+
+	return cxl_reset_hdm_available(pdev);
+}
+EXPORT_SYMBOL_FOR_MODULES(cxl_reset_capable, "vfio-cxl");
+
+/*
+ * Run the DVSEC reset sequence and restore HDM state for a caller that owns
+ * device quiesce and PCI config save/restore, such as vfio-pci.
+ * The HDM range collection and host CPU cache flush that cxl_reset_function()
+ * performs for host-owned memory are skipped as that memory belongs to the
+ * guest.
+ */
+int cxl_reset_dvsec_sequence(struct pci_dev *pdev)
+{
+	bool target_prepared = false;
+	bool reset_initiated = false;
+	int dvsec;
+	int rc;
+	u16 cap;
+
+	dvsec = cxl_reset_get_dvsec(pdev, &cap);
+	if (dvsec < 0)
+		return dvsec;
+
+	if (pdev->multifunction || pci_num_vf(pdev))
+		return -ENOTTY;
+
+	if (!pci_dev_trylock(pdev))
+		return -EBUSY;
+
+	rc = cxl_reset_execute(pdev, &target_prepared, &reset_initiated, dvsec,
+			       cap);
+	if (!rc)
+		rc = cxl_restore_state_after_pci_reset(pdev);
+	else if (reset_initiated)
+		cxl_reset_save_disabled_state(pdev);
+
+	cxl_pci_target_reset_done(pdev, &target_prepared);
+	pci_dev_unlock(pdev);
+	return rc;
+}
+EXPORT_SYMBOL_FOR_MODULES(cxl_reset_dvsec_sequence, "vfio-cxl");
diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
index 92314f67b702..a28903fc2960 100644
--- a/include/cxl/cxl.h
+++ b/include/cxl/cxl.h
@@ -168,6 +168,8 @@ void pci_cxl_hdm_init(struct pci_dev *pdev);
 void pci_cxl_hdm_release(struct pci_dev *pdev);
 int cxl_restore_state_after_pci_reset(struct pci_dev *pdev);
 int cxl_reset_function(struct pci_dev *pdev, bool probe);
+bool cxl_reset_capable(struct pci_dev *pdev);
+int cxl_reset_dvsec_sequence(struct pci_dev *pdev);
 #else
 static inline void pci_cxl_hdm_init(struct pci_dev *pdev)
 {
@@ -186,6 +188,16 @@ static inline int cxl_reset_function(struct pci_dev *pdev, bool probe)
 {
 	return -ENOTTY;
 }
+
+static inline bool cxl_reset_capable(struct pci_dev *pdev)
+{
+	return false;
+}
+
+static inline int cxl_reset_dvsec_sequence(struct pci_dev *pdev)
+{
+	return -ENOTTY;
+}
 #endif
 
 struct cxl_reg_map {
-- 
2.25.1