* [PATCH v5 0/3] arm: dts: altera: add Draeger M48 CPU Module
@ 2026-09-15 13:38 Petko Manolov
2026-09-15 13:38 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Petko Manolov @ 2026-09-15 13:38 UTC (permalink / raw)
To: linux-kernel; +Cc: devicetree, robh, krzk+dt, conor+dt, dinguyen, Petko Manolov
Adding the device trees for “Dräger M48 on NXP i.MX6 (Q) and Intel/Altera
SoCFPGA Cyclone V” board variant. It has both (the SoC and FPGA) on the same
carrier and they are cross-monitoring each other.
This is the SoCFPGA devicetree part.
Petko Manolov (3):
dt-bindings: vendor-prefixes: add Draeger AG
dt-bindings: arm: altera: add Draeger M48 Module
arm: dts: altera: add Draeger M48 CPU Module
.../devicetree/bindings/arm/altera.yaml | 1 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/intel/socfpga/Makefile | 1 +
.../socfpga/socfpga_cyclone5_draeger_m48.dts | 123 ++++++++++++++++++
4 files changed, 127 insertions(+)
create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
--
2.47.3
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG 2026-09-15 13:38 [PATCH v5 0/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov @ 2026-09-15 13:38 ` Petko Manolov 2026-09-15 16:29 ` Conor Dooley 2026-09-15 13:38 ` [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module Petko Manolov 2026-09-15 13:38 ` [PATCH v5 3/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov 2 siblings, 1 reply; 8+ messages in thread From: Petko Manolov @ 2026-09-15 13:38 UTC (permalink / raw) To: linux-kernel; +Cc: devicetree, robh, krzk+dt, conor+dt, dinguyen, Petko Manolov Add a vendor prefix for Draegar AG, which is Draegerwerk AG & Co. KGaA Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index ba2002969373..276d62b848d5 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -467,6 +467,8 @@ patternProperties: description: DPTechnics "^dptel,.*": description: Guangdong Dapu Telecom Co., Ltd. + "^draeger,.*": + description: Draegerwerk AG & Co. KGaA "^dragino,.*": description: Dragino Technology Co., Limited "^dream,.*": -- 2.47.3 ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG 2026-09-15 13:38 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov @ 2026-09-15 16:29 ` Conor Dooley 2026-09-17 15:13 ` Petko Manolov 0 siblings, 1 reply; 8+ messages in thread From: Conor Dooley @ 2026-09-15 16:29 UTC (permalink / raw) To: Petko Manolov; +Cc: linux-kernel, devicetree, robh, krzk+dt, conor+dt, dinguyen [-- Attachment #1: Type: text/plain, Size: 1066 bytes --] On Tue, Sep 15, 2026 at 04:38:02PM +0300, Petko Manolov wrote: > Add a vendor prefix for Draegar AG, which is Draegerwerk AG & Co. KGaA > > Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> A Link: to their website would be nice. Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable > --- > Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml > index ba2002969373..276d62b848d5 100644 > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml > @@ -467,6 +467,8 @@ patternProperties: > description: DPTechnics > "^dptel,.*": > description: Guangdong Dapu Telecom Co., Ltd. > + "^draeger,.*": > + description: Draegerwerk AG & Co. KGaA > "^dragino,.*": > description: Dragino Technology Co., Limited > "^dream,.*": > -- > 2.47.3 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG 2026-09-15 16:29 ` Conor Dooley @ 2026-09-17 15:13 ` Petko Manolov 2026-09-17 22:11 ` Conor 0 siblings, 1 reply; 8+ messages in thread From: Petko Manolov @ 2026-09-17 15:13 UTC (permalink / raw) To: Conor Dooley; +Cc: linux-kernel, devicetree, robh, krzk+dt, conor+dt, dinguyen On 26-09-15 17:29:29, Conor Dooley wrote: > On Tue, Sep 15, 2026 at 04:38:02PM +0300, Petko Manolov wrote: > > Add a vendor prefix for Draegar AG, which is Draegerwerk AG & Co. KGaA > > > > Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> > > A Link: to their website would be nice. I assume the link is supposed to go in the commit message, correct? Petko > Acked-by: Conor Dooley <conor.dooley@microchip.com> > pw-bot: not-applicable > > > --- > > Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml > > index ba2002969373..276d62b848d5 100644 > > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml > > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml > > @@ -467,6 +467,8 @@ patternProperties: > > description: DPTechnics > > "^dptel,.*": > > description: Guangdong Dapu Telecom Co., Ltd. > > + "^draeger,.*": > > + description: Draegerwerk AG & Co. KGaA > > "^dragino,.*": > > description: Dragino Technology Co., Limited > > "^dream,.*": > > -- > > 2.47.3 > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG 2026-09-17 15:13 ` Petko Manolov @ 2026-09-17 22:11 ` Conor 0 siblings, 0 replies; 8+ messages in thread From: Conor @ 2026-09-17 22:11 UTC (permalink / raw) To: Petko Manolov, Conor Dooley Cc: linux-kernel, devicetree, robh, krzk+dt, conor+dt, dinguyen On 17 September 2026 17:13:00 GMT+02:00, Petko Manolov <petko.manolov@konsulko.com> wrote: >On 26-09-15 17:29:29, Conor Dooley wrote: >> On Tue, Sep 15, 2026 at 04:38:02PM +0300, Petko Manolov wrote: >> > Add a vendor prefix for Draegar AG, which is Draegerwerk AG & Co. KGaA >> > >> > Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> >> >> A Link: to their website would be nice. > >I assume the link is supposed to go in the commit message, correct? Yes. Thanks, Conor. > > > Petko > > >> Acked-by: Conor Dooley <conor.dooley@microchip.com> >> pw-bot: not-applicable >> >> > --- >> > Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml >> > index ba2002969373..276d62b848d5 100644 >> > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml >> > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml >> > @@ -467,6 +467,8 @@ patternProperties: >> > description: DPTechnics >> > "^dptel,.*": >> > description: Guangdong Dapu Telecom Co., Ltd. >> > + "^draeger,.*": >> > + description: Draegerwerk AG & Co. KGaA >> > "^dragino,.*": >> > description: Dragino Technology Co., Limited >> > "^dream,.*": >> > -- >> > 2.47.3 >> > > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module 2026-09-15 13:38 [PATCH v5 0/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov 2026-09-15 13:38 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov @ 2026-09-15 13:38 ` Petko Manolov 2026-09-15 16:29 ` Conor Dooley 2026-09-15 13:38 ` [PATCH v5 3/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov 2 siblings, 1 reply; 8+ messages in thread From: Petko Manolov @ 2026-09-15 13:38 UTC (permalink / raw) To: linux-kernel; +Cc: devicetree, robh, krzk+dt, conor+dt, dinguyen, Petko Manolov Add DT compatible string for Draeger's M48 CPU Module that is also based on Altera SoCFPGA. Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> --- Documentation/devicetree/bindings/arm/altera.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 3030cf46fe74..8ed1ba733510 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -47,6 +47,7 @@ properties: - enum: - altr,socfpga-cyclone5-socdk - denx,mcvevk + - draeger,M48 - ebv,socrates - macnica,sodia - novtech,chameleon96 -- 2.47.3 ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module 2026-09-15 13:38 ` [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module Petko Manolov @ 2026-09-15 16:29 ` Conor Dooley 0 siblings, 0 replies; 8+ messages in thread From: Conor Dooley @ 2026-09-15 16:29 UTC (permalink / raw) To: Petko Manolov; +Cc: linux-kernel, devicetree, robh, krzk+dt, conor+dt, dinguyen [-- Attachment #1: Type: text/plain, Size: 982 bytes --] On Tue, Sep 15, 2026 at 04:38:03PM +0300, Petko Manolov wrote: > Add DT compatible string for Draeger's M48 CPU Module that is also > based on Altera SoCFPGA. > > Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> > --- > Documentation/devicetree/bindings/arm/altera.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml > index 3030cf46fe74..8ed1ba733510 100644 > --- a/Documentation/devicetree/bindings/arm/altera.yaml > +++ b/Documentation/devicetree/bindings/arm/altera.yaml > @@ -47,6 +47,7 @@ properties: > - enum: > - altr,socfpga-cyclone5-socdk > - denx,mcvevk > + - draeger,M48 lower case here please. pw-bot: changes-requested Thanks, Conor. > - ebv,socrates > - macnica,sodia > - novtech,chameleon96 > -- > 2.47.3 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 3/3] arm: dts: altera: add Draeger M48 CPU Module 2026-09-15 13:38 [PATCH v5 0/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov 2026-09-15 13:38 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov 2026-09-15 13:38 ` [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module Petko Manolov @ 2026-09-15 13:38 ` Petko Manolov 2 siblings, 0 replies; 8+ messages in thread From: Petko Manolov @ 2026-09-15 13:38 UTC (permalink / raw) To: linux-kernel; +Cc: devicetree, robh, krzk+dt, conor+dt, dinguyen, Petko Manolov Draeger M48 CPU Module that is built around Altera SoCFPGA. Signed-off-by: Petko Manolov <petko.manolov@konsulko.com> --- arch/arm/boot/dts/intel/socfpga/Makefile | 1 + .../socfpga/socfpga_cyclone5_draeger_m48.dts | 123 ++++++++++++++++++ 2 files changed, 124 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile index 8df0976da01c..cdcea11abdfa 100644 --- a/arch/arm/boot/dts/intel/socfpga/Makefile +++ b/arch/arm/boot/dts/intel/socfpga/Makefile @@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria10_mercury_aa1_st1_emmc.dtb \ socfpga_arria10_mercury_aa1_st1_qspi.dtb \ socfpga_arria10_mercury_aa1_st1_sdmmc.dtb \ + socfpga_cyclone5_draeger_m48.dtb \ socfpga_cyclone5_mercury_sa1_pe1_emmc.dtb \ socfpga_cyclone5_mercury_sa1_pe1_qspi.dtb \ socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts new file mode 100644 index 000000000000..838708acb31b --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Draeger and Licensors, info@draeger.com + */ +#include "socfpga_cyclone5.dtsi" + +/ { + model = "Draeger M48 Cyclone V SoC"; + compatible = "draeger,M48", "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + aliases { + /* this allow the ethaddr uboot environmnet variable contents + * to be added to the gmac0 device tree blob. + */ + ethernet0 = &gmac0; + }; + + soc { + gpio3: gpio@ff202000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0xff202000 0x20>; + + portd: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <2>; + reg = <0>; + }; + }; + + gpio4: gpio@ff202020 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0xff202020 0x20>; + + porte: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <2>; + reg = <0>; + }; + }; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii-id"; + rxc-skew-ps = <1860>; + rxd0-skew-ps = <0>; + rxd1-skew-ps = <0>; + rxd2-skew-ps = <0>; + rxd3-skew-ps = <0>; + rxdv-skew-ps = <0>; + txc-skew-ps = <900>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + txen-skew-ps = <0>; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <100000>; + + eeprom_mac: eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&mmc0 { + status = "okay"; +}; + +&qspi { + status = "okay"; + + flash: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,n25q256a", "jedec,spi-nor"; + reg = <0>; + + /* chip select */ + spi-max-frequency = <100000000>; + m25p,fast-read; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; +}; -- 2.47.3 ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-09-17 22:11 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2026-09-15 13:38 [PATCH v5 0/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov 2026-09-15 13:38 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov 2026-09-15 16:29 ` Conor Dooley 2026-09-17 15:13 ` Petko Manolov 2026-09-17 22:11 ` Conor 2026-09-15 13:38 ` [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module Petko Manolov 2026-09-15 16:29 ` Conor Dooley 2026-09-15 13:38 ` [PATCH v5 3/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov
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