* [PATCH v3 01/13] selftests/arm64: Remove big-endian support
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 02/13] arm64: bpf: Remove big-endian support from the JIT compiler Will Deacon
` (12 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN, so the arm64 selftests do
not need to worry about testing this configuration any more.
Remove the 128-bit byte-swapping helper from the fp-ptrace test and the
big-endian definition of RSEQ_SIG_DATA from the rseq test.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
tools/testing/selftests/arm64/fp/fp-ptrace.c | 19 +------------------
tools/testing/selftests/rseq/rseq-arm64.h | 5 -----
2 files changed, 1 insertion(+), 23 deletions(-)
diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c
index b435837c8c0e..9b184d78f4fd 100644
--- a/tools/testing/selftests/arm64/fp/fp-ptrace.c
+++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c
@@ -115,23 +115,6 @@ static void handle_alarm(int sig, siginfo_t *info, void *context)
got_alarm = true;
}
-#ifdef CONFIG_CPU_BIG_ENDIAN
-static __uint128_t arm64_cpu_to_le128(__uint128_t x)
-{
- u64 a = swab64(x);
- u64 b = swab64(x >> 64);
-
- return ((__uint128_t)a << 64) | b;
-}
-#else
-static __uint128_t arm64_cpu_to_le128(__uint128_t x)
-{
- return x;
-}
-#endif
-
-#define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x)
-
static bool sve_supported(void)
{
return getauxval(AT_HWCAP) & HWCAP_SVE;
@@ -932,7 +915,7 @@ static void fpsimd_to_sve(__uint128_t *v, char *z, int vl)
for (i = 0; i < __SVE_NUM_ZREGS; i++) {
p = (__uint128_t *)&z[__SVE_ZREG_OFFSET(vq, i)];
- *p = arm64_cpu_to_le128(v[i]);
+ *p = v[i];
}
}
diff --git a/tools/testing/selftests/rseq/rseq-arm64.h b/tools/testing/selftests/rseq/rseq-arm64.h
index 21e1626a7235..f9fecf941bf2 100644
--- a/tools/testing/selftests/rseq/rseq-arm64.h
+++ b/tools/testing/selftests/rseq/rseq-arm64.h
@@ -12,12 +12,7 @@
* matches code endianness.
*/
#define RSEQ_SIG_CODE 0xd428bc00 /* BRK #0x45E0. */
-
-#ifdef __AARCH64EB__
-#define RSEQ_SIG_DATA 0x00bc28d4 /* BRK #0x45E0. */
-#else
#define RSEQ_SIG_DATA RSEQ_SIG_CODE
-#endif
#define RSEQ_SIG RSEQ_SIG_DATA
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 02/13] arm64: bpf: Remove big-endian support from the JIT compiler
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
2026-09-18 14:52 ` [PATCH v3 01/13] selftests/arm64: Remove " Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 03/13] arm64: crypto: Assume a little-endian kernel Will Deacon
` (11 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove the big-endian-specific
support from the arm64 BPF JIT backend.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/net/bpf_jit_comp.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c
index c18e005a41db..a5634428fdd5 100644
--- a/arch/arm64/net/bpf_jit_comp.c
+++ b/arch/arm64/net/bpf_jit_comp.c
@@ -1439,13 +1439,8 @@ static int build_insn(const struct bpf_verifier_env *env, const struct bpf_insn
case BPF_ALU | BPF_END | BPF_FROM_LE:
case BPF_ALU | BPF_END | BPF_FROM_BE:
case BPF_ALU64 | BPF_END | BPF_FROM_LE:
-#ifdef CONFIG_CPU_BIG_ENDIAN
- if (BPF_CLASS(code) == BPF_ALU && BPF_SRC(code) == BPF_FROM_BE)
- goto emit_bswap_uxt;
-#else /* !CONFIG_CPU_BIG_ENDIAN */
if (BPF_CLASS(code) == BPF_ALU && BPF_SRC(code) == BPF_FROM_LE)
goto emit_bswap_uxt;
-#endif
switch (imm) {
case 16:
emit(A64_REV16(is64, dst, dst), ctx);
@@ -2559,15 +2554,9 @@ static void clear_garbage(struct jit_ctx *ctx, int reg, int effective_bytes)
{
if (effective_bytes) {
int garbage_bits = 64 - 8 * effective_bytes;
-#ifdef CONFIG_CPU_BIG_ENDIAN
- /* garbage bits are at the right end */
- emit(A64_LSR(1, reg, reg, garbage_bits), ctx);
- emit(A64_LSL(1, reg, reg, garbage_bits), ctx);
-#else
/* garbage bits are at the left end */
emit(A64_LSL(1, reg, reg, garbage_bits), ctx);
emit(A64_LSR(1, reg, reg, garbage_bits), ctx);
-#endif
}
}
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 03/13] arm64: crypto: Assume a little-endian kernel
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
2026-09-18 14:52 ` [PATCH v3 01/13] selftests/arm64: Remove " Will Deacon
2026-09-18 14:52 ` [PATCH v3 02/13] arm64: bpf: Remove big-endian support from the JIT compiler Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 04/13] arm64: lib: Assume a little-endian kernel in custom library routines Will Deacon
` (10 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Commit 5276ea17a23c ("lib/crc: arm64: Assume a little-endian kernel")
removed all usage of the CPU_LE()/CPU_BE() macros from the arm64 CRC
assembly now that big-endian support depends on BROKEN.
Do the same for the crypto assembly code.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/crypto/aes-ce-ccm-core.S | 4 ++--
arch/arm64/crypto/aes-neonbs-core.S | 4 ++--
arch/arm64/crypto/ghash-ce-core.S | 6 +++---
arch/arm64/crypto/sm4-ce-cipher-core.S | 4 ++--
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/crypto/aes-ce-ccm-core.S b/arch/arm64/crypto/aes-ce-ccm-core.S
index f2624238fd95..c2e8f500da14 100644
--- a/arch/arm64/crypto/aes-ce-ccm-core.S
+++ b/arch/arm64/crypto/aes-ce-ccm-core.S
@@ -50,7 +50,7 @@
ld1 {v0.16b}, [x5] /* load mac */
cbz x2, ce_aes_ccm_final
ldr x8, [x6, #8] /* load lower ctr */
-CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
+ rev x8, x8 /* keep swabbed ctr in reg */
0: /* outer loop */
ld1 {v1.8b}, [x6] /* load upper ctr */
prfm pldl1strm, [x1]
@@ -73,7 +73,7 @@ CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
st1 {v6.16b}, [x0], #16 /* write output block */
bne 0b
-CPU_LE( rev x8, x8 )
+ rev x8, x8
str x8, [x6, #8] /* store lsb end of ctr (BE) */
cbnz x7, ce_aes_ccm_final
st1 {v0.16b}, [x5] /* store mac */
diff --git a/arch/arm64/crypto/aes-neonbs-core.S b/arch/arm64/crypto/aes-neonbs-core.S
index baf450717b24..ba1f981a5464 100644
--- a/arch/arm64/crypto/aes-neonbs-core.S
+++ b/arch/arm64/crypto/aes-neonbs-core.S
@@ -824,8 +824,8 @@ SYM_FUNC_START(aesbs_ctr_encrypt)
frame_push 0
ldp x7, x8, [x5]
ld1 {v0.16b}, [x5]
-CPU_LE( rev x7, x7 )
-CPU_LE( rev x8, x8 )
+ rev x7, x7
+ rev x8, x8
adds x8, x8, #1
adc x7, x7, xzr
diff --git a/arch/arm64/crypto/ghash-ce-core.S b/arch/arm64/crypto/ghash-ce-core.S
index 33772d8fe6b5..ba350d57fc76 100644
--- a/arch/arm64/crypto/ghash-ce-core.S
+++ b/arch/arm64/crypto/ghash-ce-core.S
@@ -148,7 +148,7 @@ SYM_FUNC_START(pmull_ghash_update_p64)
sub w0, w0, #1
3: /* multiply XL by SHASH in GF(2^128) */
-CPU_LE( rev64 T1.16b, T1.16b )
+ rev64 T1.16b, T1.16b
ext T2.16b, XL.16b, XL.16b, #8
ext IN1.16b, T1.16b, T1.16b, #8
@@ -272,7 +272,7 @@ SYM_FUNC_END(pmull_ghash_update_p64)
cbz x0, 3f // tag only?
ldr w8, [x5, #12] // load lower counter
-CPU_LE( rev w8, w8 )
+ rev w8, w8
0: mov w9, #4 // max blocks per round
add x10, x0, #0xf
@@ -380,7 +380,7 @@ CPU_LE( rev w8, w8 )
ret
5:
-CPU_LE( rev w8, w8 )
+ rev w8, w8
str w8, [x5, #12] // store lower counter
st1 {XL.2d}, [x4]
b 4b
diff --git a/arch/arm64/crypto/sm4-ce-cipher-core.S b/arch/arm64/crypto/sm4-ce-cipher-core.S
index 4ac6cfbc5797..1682d727e097 100644
--- a/arch/arm64/crypto/sm4-ce-cipher-core.S
+++ b/arch/arm64/crypto/sm4-ce-cipher-core.S
@@ -18,7 +18,7 @@
SYM_FUNC_START(sm4_ce_do_crypt)
ld1 {v8.4s}, [x2]
ld1 {v0.4s-v3.4s}, [x0], #64
-CPU_LE( rev32 v8.16b, v8.16b )
+ rev32 v8.16b, v8.16b
ld1 {v4.4s-v7.4s}, [x0]
sm4e v8.4s, v0.4s
sm4e v8.4s, v1.4s
@@ -30,7 +30,7 @@ CPU_LE( rev32 v8.16b, v8.16b )
sm4e v8.4s, v7.4s
rev64 v8.4s, v8.4s
ext v8.16b, v8.16b, v8.16b, #8
-CPU_LE( rev32 v8.16b, v8.16b )
+ rev32 v8.16b, v8.16b
st1 {v8.4s}, [x1]
ret
SYM_FUNC_END(sm4_ce_do_crypt)
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 04/13] arm64: lib: Assume a little-endian kernel in custom library routines
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (2 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 03/13] arm64: crypto: Assume a little-endian kernel Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 05/13] arm64: lib: Assume a little-endian kernel in optimised string routines Will Deacon
` (9 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Commit 5276ea17a23c ("lib/crc: arm64: Assume a little-endian kernel")
removed all usage of the CPU_LE()/CPU_BE() macros from the arm64 CRC
assembly now that big-endian support depends on BROKEN.
Do the same for the rest of the custom arm64 library code, as well as
removing all usage of the '__LITTLE_ENDIAN' macro.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/lib/csum.c | 17 -----------------
arch/arm64/lib/memchr.S | 2 +-
2 files changed, 1 insertion(+), 18 deletions(-)
diff --git a/arch/arm64/lib/csum.c b/arch/arm64/lib/csum.c
index 2432683e48a6..75db718e5b6a 100644
--- a/arch/arm64/lib/csum.c
+++ b/arch/arm64/lib/csum.c
@@ -47,11 +47,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)
*/
shift = offset * 8;
data = *ptr++;
-#ifdef __LITTLE_ENDIAN
data = (data >> shift) << shift;
-#else
- data = (data << shift) >> shift;
-#endif
/*
* Body: straightforward aligned loads from here on (the paired loads
@@ -94,13 +90,8 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)
len -= 16;
ptr += 2;
-#ifdef __LITTLE_ENDIAN
data = tmp >> 64;
sum64 = accumulate(sum64, tmp);
-#else
- data = tmp;
- sum64 = accumulate(sum64, tmp >> 64);
-#endif
}
if (len > 0) {
sum64 = accumulate(sum64, data);
@@ -112,11 +103,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)
* preserving odd/even alignment.
*/
shift = len * -8;
-#ifdef __LITTLE_ENDIAN
data = (data << shift) >> shift;
-#else
- data = (data >> shift) << shift;
-#endif
sum64 = accumulate(sum64, data);
/* Finally, folding */
@@ -140,11 +127,7 @@ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
dst = *(const __uint128_t *)daddr->s6_addr;
sum += (__force u32)htonl(len);
-#ifdef __LITTLE_ENDIAN
sum += (u32)proto << 24;
-#else
- sum += proto;
-#endif
src += (src >> 64) | (src << 64);
dst += (dst >> 64) | (dst << 64);
diff --git a/arch/arm64/lib/memchr.S b/arch/arm64/lib/memchr.S
index 37a9f2a4f7f4..b14b27cb8419 100644
--- a/arch/arm64/lib/memchr.S
+++ b/arch/arm64/lib/memchr.S
@@ -63,7 +63,7 @@ L(byte_loop):
sub srcin, srcin, #1
ret
L(found_word):
-CPU_LE( rev tmp, tmp)
+ rev tmp, tmp
clz tmp, tmp
sub tmp, tmp, #64
add result, srcin, tmp, asr #3
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 05/13] arm64: lib: Assume a little-endian kernel in optimised string routines
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (3 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 04/13] arm64: lib: Assume a little-endian kernel in custom library routines Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 06/13] arm64: assembler: Remove endianness helper macros Will Deacon
` (8 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove the big-endian-specific
support from the arm64 optimised string routines. Although these
started life as a fork of Arm's "cortex strings" library and later got
updated with the "optimized-routines" code, the in-kernel implementation
has always been different enough that removing the unused big-endian
portion still makes sense.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/lib/memcmp.S | 2 -
arch/arm64/lib/strcmp.S | 34 +--------------
arch/arm64/lib/strlen.S | 26 -----------
arch/arm64/lib/strncmp.S | 93 +++-------------------------------------
arch/arm64/lib/strnlen.S | 16 +------
5 files changed, 8 insertions(+), 163 deletions(-)
diff --git a/arch/arm64/lib/memcmp.S b/arch/arm64/lib/memcmp.S
index a5ccf2c55f91..1f528ce046e4 100644
--- a/arch/arm64/lib/memcmp.S
+++ b/arch/arm64/lib/memcmp.S
@@ -103,10 +103,8 @@ L(last_bytes):
/* Compare data bytes and set return value to 0, -1 or 1. */
L(return):
-#ifndef __AARCH64EB__
rev data1, data1
rev data2, data2
-#endif
cmp data1, data2
L(ret_eq):
cset result, ne
diff --git a/arch/arm64/lib/strcmp.S b/arch/arm64/lib/strcmp.S
index 9b89b4533607..2389b47dca22 100644
--- a/arch/arm64/lib/strcmp.S
+++ b/arch/arm64/lib/strcmp.S
@@ -38,14 +38,6 @@
#define shift x9
#define off2 x10
-/* On big-endian early bytes are at MSB and on little-endian LSB.
- LS_FW means shifting towards early bytes. */
-#ifdef __AARCH64EB__
-# define LS_FW lsl
-#else
-# define LS_FW lsr
-#endif
-
/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
can be done in parallel across the entire word.
@@ -67,28 +59,17 @@ L(loop_aligned):
ldr data2, [src1, off2]
ldr data1, [src1], 8
L(start_realigned):
-#ifdef __AARCH64EB__
- rev tmp, data1
- sub has_nul, tmp, zeroones
- orr tmp, tmp, REP8_7f
-#else
sub has_nul, data1, zeroones
orr tmp, data1, REP8_7f
-#endif
bics has_nul, has_nul, tmp /* Non-zero if NUL terminator. */
ccmp data1, data2, 0, eq
b.eq L(loop_aligned)
-#ifdef __AARCH64EB__
- rev has_nul, has_nul
-#endif
eor diff, data1, data2
orr syndrome, diff, has_nul
L(end):
-#ifndef __AARCH64EB__
rev syndrome, syndrome
rev data1, data1
rev data2, data2
-#endif
clz shift, syndrome
/* The most-significant-non-zero bit of the syndrome marks either the
first bit that is different, or the top bit of the first zero byte.
@@ -113,7 +94,7 @@ L(mutual_align):
ldr data1, [src1], 8
neg shift, src2, lsl 3 /* Bits to alignment -64. */
mov tmp, -1
- LS_FW tmp, tmp, shift
+ lsr tmp, tmp, shift
orr data1, data1, tmp
orr data2, data2, tmp
b L(start_realigned)
@@ -135,9 +116,6 @@ L(src1_aligned):
neg shift, src2, lsl 3
bic src2, src2, 7
ldr data3, [src2], 8
-#ifdef __AARCH64EB__
- rev data3, data3
-#endif
lsr tmp, zeroones, shift
orr data3, data3, tmp
sub has_nul, data3, zeroones
@@ -152,9 +130,6 @@ L(src1_aligned):
L(loop_unaligned):
ldr data3, [src1, off1]
ldr data2, [src1, off2]
-#ifdef __AARCH64EB__
- rev data3, data3
-#endif
sub has_nul, data3, zeroones
orr tmp, data3, REP8_7f
ldr data1, [src1], 8
@@ -163,9 +138,6 @@ L(loop_unaligned):
b.eq L(loop_unaligned)
lsl tmp, has_nul, shift
-#ifdef __AARCH64EB__
- rev tmp, tmp
-#endif
eor diff, data1, data2
orr syndrome, diff, tmp
cbnz syndrome, L(end)
@@ -174,10 +146,6 @@ L(tail):
neg shift, shift
lsr data2, data3, shift
lsr has_nul, has_nul, shift
-#ifdef __AARCH64EB__
- rev data2, data2
- rev has_nul, has_nul
-#endif
eor diff, data1, data2
orr syndrome, diff, has_nul
b L(end)
diff --git a/arch/arm64/lib/strlen.S b/arch/arm64/lib/strlen.S
index 4919fe81ae54..a8c49a3886f6 100644
--- a/arch/arm64/lib/strlen.S
+++ b/arch/arm64/lib/strlen.S
@@ -85,14 +85,6 @@ SYM_FUNC_START(__pi_strlen)
cmp tmp1, MIN_PAGE_SIZE - 16
b.gt L(page_cross)
ldp data1, data2, [srcin]
-#ifdef __AARCH64EB__
- /* For big-endian, carry propagation (if the final byte in the
- string is 0x01) means we cannot use has_nul1/2 directly.
- Since we expect strings to be small and early-exit,
- byte-swap the data now so has_null1/2 will be correct. */
- rev data1, data1
- rev data2, data2
-#endif
sub tmp1, data1, zeroones
orr tmp2, data1, REP8_7f
sub tmp3, data2, zeroones
@@ -144,19 +136,7 @@ L(page_cross_entry):
/* Enter with C = has_nul1 == 0. */
L(tail):
-#ifdef __AARCH64EB__
- /* For big-endian, carry propagation (if the final byte in the
- string is 0x01) means we cannot use has_nul1/2 directly. The
- easiest way to get the correct byte is to byte-swap the data
- and calculate the syndrome a second time. */
- csel data1, data1, data2, cc
- rev data1, data1
- sub tmp1, data1, zeroones
- orr tmp2, data1, REP8_7f
- bic has_nul1, tmp1, tmp2
-#else
csel has_nul1, has_nul1, has_nul2, cc
-#endif
sub len, src, srcin
rev has_nul1, has_nul1
add tmp2, len, 8
@@ -194,13 +174,7 @@ L(page_cross):
ldp data1, data2, [src]
lsl tmp1, srcin, 3
mov tmp4, -1
-#ifdef __AARCH64EB__
- /* Big-endian. Early bytes are at MSB. */
- lsr tmp1, tmp4, tmp1 /* Shift (tmp1 & 63). */
-#else
- /* Little-endian. Early bytes are at LSB. */
lsl tmp1, tmp4, tmp1 /* Shift (tmp1 & 63). */
-#endif
orr tmp1, tmp1, REP8_80
orn data1, data1, tmp1
orn tmp2, data2, tmp1
diff --git a/arch/arm64/lib/strncmp.S b/arch/arm64/lib/strncmp.S
index fe7bbc0b42a7..e4fde8586089 100644
--- a/arch/arm64/lib/strncmp.S
+++ b/arch/arm64/lib/strncmp.S
@@ -45,19 +45,6 @@
#define offset pos
#define neg_offset x15
-/* Define endian dependent shift operations.
- On big-endian early bytes are at MSB and on little-endian LSB.
- LS_FW means shifting towards early bytes.
- LS_BK means shifting towards later bytes.
- */
-#ifdef __AARCH64EB__
-#define LS_FW lsl
-#define LS_BK lsr
-#else
-#define LS_FW lsr
-#define LS_BK lsl
-#endif
-
SYM_FUNC_START(__pi_strncmp)
cbz limit, L(ret0)
eor tmp1, src1, src2
@@ -86,7 +73,6 @@ L(start_realigned):
/* End of main loop */
L(full_check):
-#ifndef __AARCH64EB__
orr syndrome, diff, has_nul
add limit, limit, 8 /* Rewind limit to before last subs. */
L(syndrome_check):
@@ -105,55 +91,6 @@ L(syndrome_check):
sub result, data1, data2, lsr #56
csel result, result, xzr, hi
ret
-#else
- /* Not reached the limit, must have found the end or a diff. */
- tbz limit, #63, L(not_limit)
- add tmp1, limit, 8
- cbz limit, L(not_limit)
-
- lsl limit, tmp1, #3 /* Bits -> bytes. */
- mov mask, #~0
- lsr mask, mask, limit
- bic data1, data1, mask
- bic data2, data2, mask
-
- /* Make sure that the NUL byte is marked in the syndrome. */
- orr has_nul, has_nul, mask
-
-L(not_limit):
- /* For big-endian we cannot use the trick with the syndrome value
- as carry-propagation can corrupt the upper bits if the trailing
- bytes in the string contain 0x01. */
- /* However, if there is no NUL byte in the dword, we can generate
- the result directly. We can't just subtract the bytes as the
- MSB might be significant. */
- cbnz has_nul, 1f
- cmp data1, data2
- cset result, ne
- cneg result, result, lo
- ret
-1:
- /* Re-compute the NUL-byte detection, using a byte-reversed value. */
- rev tmp3, data1
- sub tmp1, tmp3, zeroones
- orr tmp2, tmp3, #REP8_7f
- bic has_nul, tmp1, tmp2
- rev has_nul, has_nul
- orr syndrome, diff, has_nul
- clz pos, syndrome
- /* The most-significant-non-zero bit of the syndrome marks either the
- first bit that is different, or the top bit of the first zero byte.
- Shifting left now will bring the critical information into the
- top bits. */
-L(end_quick):
- lsl data1, data1, pos
- lsl data2, data2, pos
- /* But we need to zero-extend (char is unsigned) the value and then
- perform a signed 32-bit subtraction. */
- lsr data1, data1, #56
- sub result, data1, data2, lsr #56
- ret
-#endif
L(mutual_align):
/* Sources are mutually aligned, but are not currently at an
@@ -167,7 +104,7 @@ L(mutual_align):
neg tmp3, count, lsl #3 /* 64 - bits(bytes beyond align). */
ldr data2, [src2], #8
mov tmp2, #~0
- LS_FW tmp2, tmp2, tmp3 /* Shift (count & 63). */
+ lsr tmp2, tmp2, tmp3 /* Shift (count & 63). */
/* Adjust the limit and ensure it doesn't overflow. */
adds limit, limit, count
csinv limit, limit, xzr, lo
@@ -236,15 +173,15 @@ L(src1_aligned):
neg neg_offset, offset
ldr data1, [src1], #8
ldp tmp1, tmp2, [src2], #16
- LS_BK mask, mask, neg_offset
+ lsl mask, mask, neg_offset
and neg_offset, neg_offset, #63 /* Need actual value for cmp later. */
/* Skip the first compare if data in tmp1 is irrelevant. */
tbnz offset, 6, L(misaligned_mid_loop)
L(loop_misaligned):
/* STEP_A: Compare full 8 bytes when there is enough data from SRC2.*/
- LS_FW data2, tmp1, offset
- LS_BK tmp1, tmp2, neg_offset
+ lsr data2, tmp1, offset
+ lsl tmp1, tmp2, neg_offset
subs limit, limit, #8
orr data2, data2, tmp1 /* 8 bytes from SRC2 combined from two regs.*/
sub has_nul, data1, zeroones
@@ -258,23 +195,12 @@ L(loop_misaligned):
ldr data1, [src1], #8
L(misaligned_mid_loop):
/* STEP_B: Compare first part of data1 to second part of tmp2. */
- LS_FW data2, tmp2, offset
-#ifdef __AARCH64EB__
- /* For big-endian we do a byte reverse to avoid carry-propagation
- problem described above. This way we can reuse the has_nul in the
- next step and also use syndrome value trick at the end. */
- rev tmp3, data1
- #define data1_fixed tmp3
-#else
+ lsr data2, tmp2, offset
#define data1_fixed data1
-#endif
sub has_nul, data1_fixed, zeroones
orr tmp3, data1_fixed, #REP8_7f
eor diff, data2, data1 /* Non-zero if differences found. */
bic has_nul, has_nul, tmp3 /* Non-zero if NUL terminator. */
-#ifdef __AARCH64EB__
- rev has_nul, has_nul
-#endif
cmp limit, neg_offset, lsr #3
orr syndrome, diff, has_nul
bic syndrome, syndrome, mask /* Ignore later bytes. */
@@ -284,7 +210,7 @@ L(misaligned_mid_loop):
/* STEP_C: Compare second part of data1 to first part of tmp1. */
ldp tmp1, tmp2, [src2], #16
cmp limit, #8
- LS_BK data2, tmp1, neg_offset
+ lsl data2, tmp1, neg_offset
eor diff, data2, data1 /* Non-zero if differences found. */
orr syndrome, diff, has_nul
and syndrome, syndrome, mask /* Ignore earlier bytes. */
@@ -295,13 +221,6 @@ L(misaligned_mid_loop):
sub limit, limit, #8
b L(loop_misaligned)
-#ifdef __AARCH64EB__
-L(syndrome_check):
- clz pos, syndrome
- cmp pos, limit, lsl #3
- b.lo L(end_quick)
-#endif
-
L(ret0):
mov result, #0
ret
diff --git a/arch/arm64/lib/strnlen.S b/arch/arm64/lib/strnlen.S
index d5ac0e10a01d..b20011d559f1 100644
--- a/arch/arm64/lib/strnlen.S
+++ b/arch/arm64/lib/strnlen.S
@@ -91,22 +91,10 @@ SYM_FUNC_START(__pi_strnlen)
*/
sub len, src, srcin
cbz has_nul1, .Lnul_in_data2
-CPU_BE( mov data2, data1 ) /*perpare data to re-calculate the syndrome*/
sub len, len, #8
mov has_nul2, has_nul1
.Lnul_in_data2:
- /*
- * For big-endian, carry propagation (if the final byte in the
- * string is 0x01) means we cannot use has_nul directly. The
- * easiest way to get the correct byte is to byte-swap the data
- * and calculate the syndrome a second time.
- */
-CPU_BE( rev data2, data2 )
-CPU_BE( sub tmp1, data2, zeroones )
-CPU_BE( orr tmp2, data2, #REP8_7f )
-CPU_BE( bic has_nul2, tmp1, tmp2 )
-
sub len, len, #8
rev has_nul2, has_nul2
clz pos, has_nul2
@@ -139,10 +127,8 @@ CPU_BE( bic has_nul2, tmp1, tmp2 )
lsl tmp4, tmp4, #3 /* Bytes beyond alignment -> bits. */
mov tmp2, #~0
- /* Big-endian. Early bytes are at MSB. */
-CPU_BE( lsl tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
/* Little-endian. Early bytes are at LSB. */
-CPU_LE( lsr tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
+ lsr tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
cmp tmp1, #8
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 06/13] arm64: assembler: Remove endianness helper macros
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (4 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 05/13] arm64: lib: Assume a little-endian kernel in optimised string routines Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 07/13] arm64: vdso32: Always build compat vDSO object as little-endian Will Deacon
` (7 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
The CPU_LE()/CPU_BE() helper macros are only used by head.S. Since
big-endian support depends on BROKEN, remove the last users along with
the macro definitions. The unused regs_to_64() assembly macro, which
somewhat bizarrely behaves differently depend on the endianness, is also
removed.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/assembler.h | 31 ------------------------------
arch/arm64/kernel/head.S | 3 +--
2 files changed, 1 insertion(+), 33 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 0b58b550e8dc..42a167a75486 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -129,37 +129,6 @@ lr .req x30 // link register
b \label
.endm
-/*
- * Select code when configured for BE.
- */
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define CPU_BE(code...) code
-#else
-#define CPU_BE(code...)
-#endif
-
-/*
- * Select code when configured for LE.
- */
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define CPU_LE(code...)
-#else
-#define CPU_LE(code...) code
-#endif
-
-/*
- * Define a macro that constructs a 64-bit value by concatenating two
- * 32-bit registers. Note that on big endian systems the order of the
- * registers is swapped.
- */
-#ifndef CONFIG_CPU_BIG_ENDIAN
- .macro regs_to_64, rd, lbits, hbits
-#else
- .macro regs_to_64, rd, hbits, lbits
-#endif
- orr \rd, \lbits, \hbits, lsl #32
- .endm
-
/*
* Pseudo-ops for PC-relative adr/ldr/str <reg>, <symbol> where
* <symbol> is within the range +/- 4 GB of the PC.
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 87a822e5c4ca..8951ce693552 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -138,8 +138,7 @@ SYM_CODE_START_LOCAL(record_mmu_state)
b.ne 0f
mrs x19, sctlr_el2
0:
-CPU_LE( tbnz x19, #SCTLR_ELx_EE_SHIFT, 1f )
-CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f )
+ tbnz x19, #SCTLR_ELx_EE_SHIFT, 1f
tst x19, #SCTLR_ELx_C // Z := (C == 0)
and x19, x19, #SCTLR_ELx_M // isolate M bit
csel x19, xzr, x19, eq // clear x19 if Z
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 07/13] arm64: vdso32: Always build compat vDSO object as little-endian
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (5 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 06/13] arm64: assembler: Remove endianness helper macros Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 08/13] KVM: arm64: Remove support for a big-endian hypervisor object Will Deacon
` (6 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove support for building a
big-endian 32-bit vDSO.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kernel/vdso32/Makefile | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/kernel/vdso32/Makefile b/arch/arm64/kernel/vdso32/Makefile
index bea3675fa668..00efdc5d2354 100644
--- a/arch/arm64/kernel/vdso32/Makefile
+++ b/arch/arm64/kernel/vdso32/Makefile
@@ -45,11 +45,7 @@ endif
# From arm Makefile
VDSO_CAFLAGS += $(call cc32-option,-fno-dwarf2-cfi-asm)
VDSO_CAFLAGS += -mabi=aapcs-linux -mfloat-abi=soft
-ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
-VDSO_CAFLAGS += -mbig-endian
-else
VDSO_CAFLAGS += -mlittle-endian
-endif
# From arm vDSO Makefile
VDSO_CAFLAGS += -fPIC -fno-builtin -fno-stack-protector
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 08/13] KVM: arm64: Remove support for a big-endian hypervisor object
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (6 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 07/13] arm64: vdso32: Always build compat vDSO object as little-endian Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 09/13] arm64: Remove all usage of CONFIG_CPU_BIG_ENDIAN Will Deacon
` (5 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove the support for generating
ELF relocations for a big-endian hypervisor object and drop the unused
big-endian spinlock definition from nVHE.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/hyp/include/nvhe/spinlock.h | 4 ----
arch/arm64/kvm/hyp/nvhe/gen-hyprel.c | 16 ----------------
2 files changed, 20 deletions(-)
diff --git a/arch/arm64/kvm/hyp/include/nvhe/spinlock.h b/arch/arm64/kvm/hyp/include/nvhe/spinlock.h
index 7c7ea8c55405..b6978f03e86a 100644
--- a/arch/arm64/kvm/hyp/include/nvhe/spinlock.h
+++ b/arch/arm64/kvm/hyp/include/nvhe/spinlock.h
@@ -20,11 +20,7 @@
typedef union hyp_spinlock {
u32 __val;
struct {
-#ifdef __AARCH64EB__
- u16 next, owner;
-#else
u16 owner, next;
-#endif
};
} hyp_spinlock_t;
diff --git a/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c b/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c
index b63f4e1c1033..99243e0fefb0 100644
--- a/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c
+++ b/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c
@@ -139,28 +139,12 @@ static struct {
const char *sh_string;
} elf;
-#if defined(CONFIG_CPU_LITTLE_ENDIAN)
-
#define elf16toh(x) le16toh(x)
#define elf32toh(x) le32toh(x)
#define elf64toh(x) le64toh(x)
#define ELFENDIAN ELFDATA2LSB
-#elif defined(CONFIG_CPU_BIG_ENDIAN)
-
-#define elf16toh(x) be16toh(x)
-#define elf32toh(x) be32toh(x)
-#define elf64toh(x) be64toh(x)
-
-#define ELFENDIAN ELFDATA2MSB
-
-#else
-
-#error PDP-endian sadly unsupported...
-
-#endif
-
#define fatal_error(fmt, ...) \
({ \
fprintf(stderr, "error: %s: " fmt "\n", \
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 09/13] arm64: Remove all usage of CONFIG_CPU_BIG_ENDIAN
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (7 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 08/13] KVM: arm64: Remove support for a big-endian hypervisor object Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 10/13] arm64: Remove all usage of __AARCH64EB__ Will Deacon
` (4 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove all usage of
CONFIG_CPU_BIG_ENDIAN from the arm64 kernel port.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/processor.h | 2 --
arch/arm64/include/asm/ptrace.h | 6 ----
arch/arm64/include/asm/sysreg.h | 50 ++++++++--------------------
arch/arm64/include/asm/thread_info.h | 5 ---
arch/arm64/kernel/fpsimd.c | 21 ++----------
arch/arm64/kernel/image.h | 18 ++--------
arch/arm64/kernel/kexec_image.c | 5 ++-
arch/arm64/kernel/kgdb.c | 6 +---
arch/arm64/kernel/ptrace.c | 8 ++---
arch/arm64/kernel/signal32.c | 3 --
arch/arm64/kernel/sys32.c | 5 ---
11 files changed, 23 insertions(+), 106 deletions(-)
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 6dfbcacd9ba0..481f1999f7c1 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -351,8 +351,6 @@ static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
unsigned long pstate = PSR_AA32_MODE_USR;
if (pc & 1)
pstate |= PSR_AA32_T_BIT;
- if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
- pstate |= PSR_AA32_E_BIT;
start_thread_common(regs, pc, pstate);
spectre_v4_enable_task_mitigation(current);
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index f7dc5fb9427d..57c98c775aca 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -66,12 +66,6 @@
#define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */
#define PSR_AA32_GE_MASK 0x000f0000
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define PSR_AA32_ENDSTATE PSR_AA32_E_BIT
-#else
-#define PSR_AA32_ENDSTATE 0
-#endif
-
/* AArch32 CPSR bits, as seen in AArch32 */
#define COMPAT_PSR_DIT_BIT 0x00200000
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 7aa08d59d494..f97c60b5dfca 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -62,19 +62,10 @@
#else /* CONFIG_BROKEN_GAS_INST */
-#ifndef CONFIG_CPU_BIG_ENDIAN
-#define __INSTR_BSWAP(x) (x)
-#else /* CONFIG_CPU_BIG_ENDIAN */
-#define __INSTR_BSWAP(x) ((((x) << 24) & 0xff000000) | \
- (((x) << 8) & 0x00ff0000) | \
- (((x) >> 8) & 0x0000ff00) | \
- (((x) >> 24) & 0x000000ff))
-#endif /* CONFIG_CPU_BIG_ENDIAN */
-
#ifdef __ASSEMBLER__
-#define __emit_inst(x) .long __INSTR_BSWAP(x)
+#define __emit_inst(x) .long (x)
#else /* __ASSEMBLER__ */
-#define __emit_inst(x) ".long " __stringify(__INSTR_BSWAP(x)) "\n\t"
+#define __emit_inst(x) ".long " __stringify(x) "\n\t"
#endif /* __ASSEMBLER__ */
#endif /* CONFIG_BROKEN_GAS_INST */
@@ -835,39 +826,26 @@
#define SCTLR_ELx_A (BIT(1))
#define SCTLR_ELx_M (BIT(0))
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define ENDIAN_SET_EL2 SCTLR_ELx_EE
-#else
-#define ENDIAN_SET_EL2 0
-#endif
-
#define INIT_SCTLR_EL2_MMU_ON \
(SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | SCTLR_ELx_I | \
- SCTLR_ELx_IESB | SCTLR_ELx_WXN | ENDIAN_SET_EL2 | \
- SCTLR_ELx_ITFSB | SCTLR_ELx_EIS | SCTLR_ELx_EOS | SCTLR_EL2_RES1)
+ SCTLR_ELx_IESB | SCTLR_ELx_WXN | SCTLR_ELx_ITFSB | \
+ SCTLR_ELx_EIS | SCTLR_ELx_EOS | SCTLR_EL2_RES1)
-#define INIT_SCTLR_EL2_MMU_OFF \
- (SCTLR_EL2_RES1 | ENDIAN_SET_EL2)
+#define INIT_SCTLR_EL2_MMU_OFF (SCTLR_EL2_RES1)
/* SCTLR_EL1 specific flags. */
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE)
-#else
-#define ENDIAN_SET_EL1 0
-#endif
-
#define INIT_SCTLR_EL1_MMU_OFF \
- (ENDIAN_SET_EL1 | SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | \
- SCTLR_EL1_EIS | SCTLR_EL1_TSCXT | SCTLR_EL1_EOS)
+ (SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | SCTLR_EL1_EIS | \
+ SCTLR_EL1_TSCXT | SCTLR_EL1_EOS)
#define INIT_SCTLR_EL1_MMU_ON \
- (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | \
- SCTLR_EL1_SA0 | SCTLR_EL1_SED | SCTLR_ELx_I | \
- SCTLR_EL1_DZE | SCTLR_EL1_UCT | SCTLR_EL1_nTWE | \
- SCTLR_ELx_IESB | SCTLR_EL1_SPAN | SCTLR_ELx_ITFSB | \
- ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_EPAN | \
- SCTLR_EL1_LSMAOE | SCTLR_EL1_nTLSMD | SCTLR_EL1_EIS | \
- SCTLR_EL1_TSCXT | SCTLR_EL1_EOS)
+ (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | \
+ SCTLR_EL1_SA0 | SCTLR_EL1_SED | SCTLR_ELx_I | \
+ SCTLR_EL1_DZE | SCTLR_EL1_UCT | SCTLR_EL1_nTWE | \
+ SCTLR_ELx_IESB | SCTLR_EL1_SPAN | SCTLR_ELx_ITFSB | \
+ SCTLR_EL1_UCI | SCTLR_EL1_EPAN | SCTLR_EL1_LSMAOE | \
+ SCTLR_EL1_nTLSMD | SCTLR_EL1_EIS | SCTLR_EL1_TSCXT | \
+ SCTLR_EL1_EOS)
/* MAIR_ELx memory attributes (used by Linux) */
#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00)
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 5d7fe3e153c8..161b91762e93 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -29,13 +29,8 @@ struct thread_info {
union {
u64 preempt_count; /* 0 => preemptible, <0 => bug */
struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- u32 need_resched;
- u32 count;
-#else
u32 count;
u32 need_resched;
-#endif
} preempt;
};
#ifdef CONFIG_SHADOW_CALL_STACK
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index e7f1682a3059..65e7147067aa 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -621,23 +621,6 @@ static int __init sme_sysctl_init(void) { return 0; }
#define ZREG(sve_state, vq, n) ((char *)(sve_state) + \
(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
-#ifdef CONFIG_CPU_BIG_ENDIAN
-static __uint128_t arm64_cpu_to_le128(__uint128_t x)
-{
- u64 a = swab64(x);
- u64 b = swab64(x >> 64);
-
- return ((__uint128_t)a << 64) | b;
-}
-#else
-static __uint128_t arm64_cpu_to_le128(__uint128_t x)
-{
- return x;
-}
-#endif
-
-#define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x)
-
static void __fpsimd_to_sve(struct arm64_sve_state *sst,
struct user_fpsimd_state const *fst,
unsigned int vq)
@@ -647,7 +630,7 @@ static void __fpsimd_to_sve(struct arm64_sve_state *sst,
for (i = 0; i < SVE_NUM_ZREGS; ++i) {
p = (__uint128_t *)ZREG(sst, vq, i);
- *p = arm64_cpu_to_le128(fst->vregs[i]);
+ *p = fst->vregs[i];
}
}
@@ -702,7 +685,7 @@ static inline void sve_to_fpsimd(struct task_struct *task)
vq = sve_vq_from_vl(vl);
for (i = 0; i < SVE_NUM_ZREGS; ++i) {
p = (__uint128_t const *)ZREG(sst, vq, i);
- fst->vregs[i] = arm64_le128_to_cpu(*p);
+ fst->vregs[i] = *p;
}
}
diff --git a/arch/arm64/kernel/image.h b/arch/arm64/kernel/image.h
index 7bc3ba897901..5c10ca773363 100644
--- a/arch/arm64/kernel/image.h
+++ b/arch/arm64/kernel/image.h
@@ -24,28 +24,14 @@
* when PIE is in effect. So we need to split them up in 32-bit high and low
* words.
*/
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define DATA_LE32(data) \
- ((((data) & 0x000000ff) << 24) | \
- (((data) & 0x0000ff00) << 8) | \
- (((data) & 0x00ff0000) >> 8) | \
- (((data) & 0xff000000) >> 24))
-#else
-#define DATA_LE32(data) ((data) & 0xffffffff)
-#endif
-
#define DEFINE_IMAGE_LE64(sym, data) \
- sym##_lo32 = DATA_LE32((data) & 0xffffffff); \
- sym##_hi32 = DATA_LE32((data) >> 32)
+ sym##_lo32 = (data) & 0xffffffff; \
+ sym##_hi32 = (data) >> 32
#define __HEAD_FLAG(field) (__HEAD_FLAG_##field << \
ARM64_IMAGE_FLAG_##field##_SHIFT)
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define __HEAD_FLAG_BE ARM64_IMAGE_FLAG_BE
-#else
#define __HEAD_FLAG_BE ARM64_IMAGE_FLAG_LE
-#endif
#define __HEAD_FLAG_PAGE_SIZE ((PAGE_SHIFT - 10) / 2)
diff --git a/arch/arm64/kernel/kexec_image.c b/arch/arm64/kernel/kexec_image.c
index b70f4df15a1a..b8d0fb0a9daf 100644
--- a/arch/arm64/kernel/kexec_image.c
+++ b/arch/arm64/kernel/kexec_image.c
@@ -40,7 +40,7 @@ static void *image_load(struct kimage *image,
{
struct arm64_image_header *h;
u64 flags, value;
- bool be_image, be_kernel;
+ bool be_image;
struct kexec_buf kbuf = {};
unsigned long text_offset, kernel_segment_number;
struct kexec_segment *kernel_segment;
@@ -58,8 +58,7 @@ static void *image_load(struct kimage *image,
/* Check cpu features */
flags = le64_to_cpu(h->flags);
be_image = arm64_image_flag_field(flags, ARM64_IMAGE_FLAG_BE);
- be_kernel = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
- if ((be_image != be_kernel) && !system_supports_mixed_endian())
+ if (be_image && !system_supports_mixed_endian())
return ERR_PTR(-EINVAL);
value = arm64_image_flag_field(flags, ARM64_IMAGE_FLAG_PAGE_SIZE);
diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c
index 968324a79a89..3426d0908973 100644
--- a/arch/arm64/kernel/kgdb.c
+++ b/arch/arm64/kernel/kgdb.c
@@ -60,11 +60,7 @@ struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {
* 32-bits. Look for the big comment in asm/kgdb.h for more
* detail.
*/
- { "pstate", 4, offsetof(struct pt_regs, pstate)
-#ifdef CONFIG_CPU_BIG_ENDIAN
- + 4
-#endif
- },
+ { "pstate", 4, offsetof(struct pt_regs, pstate)},
{ "v0", 16, -1 },
{ "v1", 16, -1 },
{ "v2", 16, -1 },
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index f743cbec1c3a..7405c76724bf 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -2517,12 +2517,8 @@ static int valid_compat_regs(struct user_pt_regs *regs)
{
regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
- if (!system_supports_mixed_endian_el0()) {
- if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
- regs->pstate |= PSR_AA32_E_BIT;
- else
- regs->pstate &= ~PSR_AA32_E_BIT;
- }
+ if (!system_supports_mixed_endian_el0())
+ regs->pstate &= ~PSR_AA32_E_BIT;
if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
(regs->pstate & PSR_AA32_A_BIT) == 0 &&
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index bb3b526ff43f..5edcab50f753 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -334,9 +334,6 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
/* The IT state must be cleared for both ARM and Thumb-2 */
spsr &= ~PSR_AA32_IT_MASK;
- /* Restore the original endianness */
- spsr |= PSR_AA32_ENDSTATE;
-
if (ka->sa.sa_flags & SA_RESTORER) {
retcode = ptr_to_compat(ka->sa.sa_restorer);
} else {
diff --git a/arch/arm64/kernel/sys32.c b/arch/arm64/kernel/sys32.c
index 12a948f3a504..8ac07aeb018d 100644
--- a/arch/arm64/kernel/sys32.c
+++ b/arch/arm64/kernel/sys32.c
@@ -59,12 +59,7 @@ COMPAT_SYSCALL_DEFINE6(aarch32_mmap2, unsigned long, addr, unsigned long, len,
return ksys_mmap_pgoff(addr, len, prot, flags, fd, off_4k);
}
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define arg_u32p(name) u32, name##_hi, u32, name##_lo
-#else
#define arg_u32p(name) u32, name##_lo, u32, name##_hi
-#endif
-
#define arg_u64(name) (((u64)name##_hi << 32) | name##_lo)
COMPAT_SYSCALL_DEFINE6(aarch32_pread64, unsigned int, fd, char __user *, buf,
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 10/13] arm64: Remove all usage of __AARCH64EB__
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (8 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 09/13] arm64: Remove all usage of CONFIG_CPU_BIG_ENDIAN Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 11/13] crypto: hisilicon/sec2: Remove check of CONFIG_CPU_LITTLE_ENDIAN Will Deacon
` (3 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Big-endian support on arm64 depends on BROKEN. In preparation for
removing the dead code altogether, remove all usage of
__AARCH64EB__ from the arm64 kernel port.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/compat.h | 14 --------------
arch/arm64/include/asm/elf.h | 12 ------------
arch/arm64/include/asm/word-at-a-time.h | 6 ------
arch/arm64/include/uapi/asm/byteorder.h | 4 ----
arch/arm64/kernel/signal32.c | 10 ----------
arch/arm64/mm/extable.c | 5 -----
6 files changed, 51 deletions(-)
diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index ae904a1ad529..5e4cc4d2f872 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -28,34 +28,20 @@ typedef u16 compat_ipc_pid_t;
#include <linux/sched.h>
#include <linux/sched/task_stack.h>
-#ifdef __AARCH64EB__
-#define COMPAT_UTS_MACHINE "armv8b\0\0"
-#else
#define COMPAT_UTS_MACHINE "armv8l\0\0"
-#endif
typedef u16 __compat_uid16_t;
typedef u16 __compat_gid16_t;
typedef s32 compat_nlink_t;
struct compat_stat {
-#ifdef __AARCH64EB__
- short st_dev;
- short __pad1;
-#else
compat_dev_t st_dev;
-#endif
compat_ino_t st_ino;
compat_mode_t st_mode;
compat_ushort_t st_nlink;
__compat_uid16_t st_uid;
__compat_gid16_t st_gid;
-#ifdef __AARCH64EB__
- short st_rdev;
- short __pad2;
-#else
compat_dev_t st_rdev;
-#endif
compat_off_t st_size;
compat_off_t st_blksize;
compat_off_t st_blocks;
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index d2779d604c7b..5a0bd3d38b1a 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -72,11 +72,7 @@
* These are used to set parameters in the core dumps.
*/
#define ELF_CLASS ELFCLASS64
-#ifdef __AARCH64EB__
-#define ELF_DATA ELFDATA2MSB
-#else
#define ELF_DATA ELFDATA2LSB
-#endif
#define ELF_ARCH EM_AARCH64
/*
@@ -85,11 +81,7 @@
* intent than poking at uname or /proc/cpuinfo.
*/
#define ELF_PLATFORM_SIZE 16
-#ifdef __AARCH64EB__
-#define ELF_PLATFORM ("aarch64_be")
-#else
#define ELF_PLATFORM ("aarch64")
-#endif
/*
* This is used to ensure we don't load something for the wrong architecture.
@@ -195,11 +187,7 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12))
#endif
-#ifdef __AARCH64EB__
-#define COMPAT_ELF_PLATFORM ("v8b")
-#else
#define COMPAT_ELF_PLATFORM ("v8l")
-#endif
/* AArch32 registers. */
#define COMPAT_ELF_NGREG 18
diff --git a/arch/arm64/include/asm/word-at-a-time.h b/arch/arm64/include/asm/word-at-a-time.h
index 824ca6987a51..d7a3b69dc8c6 100644
--- a/arch/arm64/include/asm/word-at-a-time.h
+++ b/arch/arm64/include/asm/word-at-a-time.h
@@ -7,8 +7,6 @@
#include <linux/uaccess.h>
-#ifndef __AARCH64EB__
-
#include <linux/bitops.h>
#include <linux/wordpart.h>
@@ -36,10 +34,6 @@ static inline unsigned long zero_bytemask(unsigned long bits)
return bits >> 7;
}
-#else /* __AARCH64EB__ */
-#include <asm-generic/word-at-a-time.h>
-#endif
-
/*
* Load an unaligned word from kernel space.
*
diff --git a/arch/arm64/include/uapi/asm/byteorder.h b/arch/arm64/include/uapi/asm/byteorder.h
index ca9cfdab33fc..b078e60f0506 100644
--- a/arch/arm64/include/uapi/asm/byteorder.h
+++ b/arch/arm64/include/uapi/asm/byteorder.h
@@ -17,10 +17,6 @@
#ifndef __ASM_BYTEORDER_H
#define __ASM_BYTEORDER_H
-#ifdef __AARCH64EB__
-#include <linux/byteorder/big_endian.h>
-#else
#include <linux/byteorder/little_endian.h>
-#endif
#endif /* __ASM_BYTEORDER_H */
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index 5edcab50f753..3e1ce0b00a68 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -70,22 +70,12 @@ static inline int get_sigset_t(sigset_t *set,
/*
* VFP save/restore code.
- *
- * We have to be careful with endianness, since the fpsimd context-switch
- * code operates on 128-bit (Q) register values whereas the compat ABI
- * uses an array of 64-bit (D) registers. Consequently, we need to swap
- * the two halves of each Q register when running on a big-endian CPU.
*/
union __fpsimd_vreg {
__uint128_t raw;
struct {
-#ifdef __AARCH64EB__
- u64 hi;
- u64 lo;
-#else
u64 lo;
u64 hi;
-#endif
};
};
diff --git a/arch/arm64/mm/extable.c b/arch/arm64/mm/extable.c
index 6e0528831cd3..299a244f68e6 100644
--- a/arch/arm64/mm/extable.c
+++ b/arch/arm64/mm/extable.c
@@ -79,12 +79,7 @@ ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,
addr &= ~0x7UL;
data = *(unsigned long*)addr;
-
-#ifndef __AARCH64EB__
data >>= 8 * offset;
-#else
- data <<= 8 * offset;
-#endif
pt_regs_write_reg(regs, reg_data, data);
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 11/13] crypto: hisilicon/sec2: Remove check of CONFIG_CPU_LITTLE_ENDIAN
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (9 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 10/13] arm64: Remove all usage of __AARCH64EB__ Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 12/13] arm64: Kbuild: Remove vestigial big-endian support Will Deacon
` (2 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier,
Chenghai Huang, Weili Qian, Zaibo Xu, Longfang Liu, Kai Ye,
Wei Zhang
The hisilicon "sec" driver targets arm64 but can be compile-tested on
other 64-bit architectures. In preparation for removing the definition
of CONFIG_CPU_LITTLE_ENDIAN for arm64 (since it will be little-endian
only), invert the check in sec_set_endian() so that it behaves as
little-endian by default.
Cc: Chenghai Huang <huangchenghai2@huawei.com>
Cc: Weili Qian <qianweili@huawei.com>
Cc: Zaibo Xu <xuzaibo@huawei.com>
Cc: Longfang Liu <liulongfang@huawei.com>
Cc: Kai Ye <yekai13@huawei.com>
Cc: Wei Zhang <zhangwei375@huawei.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 752565200c16..03523cfbb28e 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -484,7 +484,7 @@ static void sec_set_endian(struct hisi_qm *qm)
if (!IS_ENABLED(CONFIG_64BIT))
reg |= BIT(1);
- if (!IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
+ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
reg |= BIT(0);
writel_relaxed(reg, qm->io_base + SEC_CONTROL_REG);
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 12/13] arm64: Kbuild: Remove vestigial big-endian support
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (10 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 11/13] crypto: hisilicon/sec2: Remove check of CONFIG_CPU_LITTLE_ENDIAN Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 14:52 ` [PATCH v3 13/13] drivers: Kconfig: Simplify dependencies on ARM64 && !CPU_BIG_ENDIAN Will Deacon
2026-09-18 16:22 ` [PATCH v3 00/14] arm64: Remove unused big-endian support Mark Rutland
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
Since 1cf89b6bf660 ("arm64: Kconfig: Make CPU_BIG_ENDIAN depend on
BROKEN"), CONFIG_CPU_BIG_ENDIAN has depended on BROKEN for arm64.
Remove the last traces of its existence and unconditionally force a
little-endian kernel build.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/Kconfig | 35 ++++-------------------------------
arch/arm64/Makefile | 12 ++----------
2 files changed, 6 insertions(+), 41 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b5a51b0ef944..766410827f3c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -73,7 +73,7 @@ config ARM64
select ARCH_SUPPORTS_HUGETLBFS
select ARCH_SUPPORTS_MEMORY_FAILURE
select ARCH_SUPPORTS_SHADOW_CALL_STACK if CC_HAVE_SHADOW_CALL_STACK
- select ARCH_SUPPORTS_LTO_CLANG if CPU_LITTLE_ENDIAN
+ select ARCH_SUPPORTS_LTO_CLANG
select ARCH_SUPPORTS_LTO_CLANG_THIN
select ARCH_SUPPORTS_CFI
select ARCH_SUPPORTS_ATOMIC_RMW
@@ -224,7 +224,7 @@ config ARM64
select HAVE_FUNCTION_ARG_ACCESS_API
select MMU_GATHER_RCU_TABLE_FREE
select HAVE_RSEQ
- select HAVE_RUST if RUSTC_SUPPORTS_ARM64
+ select HAVE_RUST
select HAVE_STACKPROTECTOR
select HAVE_STATIC_CALL if CFI
select HAVE_SYSCALL_TRACEPOINTS
@@ -263,10 +263,6 @@ config ARM64
help
ARM 64-bit (AArch64) Linux support.
-config RUSTC_SUPPORTS_ARM64
- def_bool y
- depends on CPU_LITTLE_ENDIAN
-
config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
def_bool CC_IS_CLANG
# https://github.com/ClangBuiltLinux/linux/issues/1507
@@ -1596,28 +1592,6 @@ config ARM64_LPA2
def_bool y
depends on ARM64_PA_BITS_52 && !ARM64_64K_PAGES
-choice
- prompt "Endianness"
- default CPU_LITTLE_ENDIAN
- help
- Select the endianness of data accesses performed by the CPU. Userspace
- applications will need to be compiled and linked for the endianness
- that is selected here.
-
-config CPU_BIG_ENDIAN
- bool "Build big-endian kernel"
- depends on BROKEN
- help
- Say Y if you plan on running a kernel with a big-endian userspace.
-
-config CPU_LITTLE_ENDIAN
- bool "Build little-endian kernel"
- help
- Say Y if you plan on running a kernel with a little-endian userspace.
- This is usually the case for distributions targeting arm64.
-
-endchoice
-
config NR_CPUS
int "Maximum number of CPUs (2-4096)"
range 2 4096
@@ -1855,7 +1829,6 @@ config KUSER_HELPERS
config COMPAT_VDSO
bool "Enable vDSO for 32-bit applications"
- depends on !CPU_BIG_ENDIAN
depends on (CC_IS_CLANG && LD_IS_LLD) || "$(CROSS_COMPILE_COMPAT)" != ""
default y
help
@@ -2319,7 +2292,7 @@ menu "ARMv9.6 architectural features"
config ARM64_LSUI
bool "Support Unprivileged Load Store Instructions (LSUI)"
default y
- depends on AS_HAS_LSUI && !CPU_BIG_ENDIAN
+ depends on AS_HAS_LSUI
help
The Unprivileged Load Store Instructions (LSUI) provides
variants load/store instructions that access user-space memory
@@ -2524,7 +2497,7 @@ config EFI_STUB
config EFI
bool "UEFI runtime support"
- depends on OF && !CPU_BIG_ENDIAN
+ depends on OF
depends on KERNEL_MODE_NEON
select ARCH_SUPPORTS_ACPI
select LIBFDT
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 6b005c8fef70..04e1a0d12f8f 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -119,20 +119,12 @@ KBUILD_CFLAGS += -ffixed-x18
KBUILD_RUSTFLAGS += -Zfixed-x18
endif
-ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
-KBUILD_CPPFLAGS += -mbig-endian
-CHECKFLAGS += -D__AARCH64EB__
-# Prefer the baremetal ELF build target, but not all toolchains include
-# it so fall back to the standard linux version if needed.
-KBUILD_LDFLAGS += -EB $(call ld-option, -maarch64elfb, -maarch64linuxb -z norelro)
-UTS_MACHINE := aarch64_be
-else
KBUILD_CPPFLAGS += -mlittle-endian
CHECKFLAGS += -D__AARCH64EL__
-# Same as above, prefer ELF but fall back to linux target if needed.
+# Prefer the baremetal ELF build target, but not all toolchains include
+# it so fall back to the standard linux version if needed.
KBUILD_LDFLAGS += -EL $(call ld-option, -maarch64elf, -maarch64linux -z norelro)
UTS_MACHINE := aarch64
-endif
ifeq ($(CONFIG_LD_IS_LLD), y)
KBUILD_LDFLAGS += -z norelro
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 13/13] drivers: Kconfig: Simplify dependencies on ARM64 && !CPU_BIG_ENDIAN
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (11 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 12/13] arm64: Kbuild: Remove vestigial big-endian support Will Deacon
@ 2026-09-18 14:52 ` Will Deacon
2026-09-18 16:22 ` [PATCH v3 00/14] arm64: Remove unused big-endian support Mark Rutland
13 siblings, 0 replies; 15+ messages in thread
From: Will Deacon @ 2026-09-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-kernel, Will Deacon, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier,
Michael Kelley
Now that arm64 no longer supports a big-endian kernel, simplify some
driver Kconfig entries so that the dependency on a little-endian kernel
no longer needs to be called out explicitly.
Reviewed-by: Michael Kelley <mhklinux@outlook.com> # Hyper-V
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will@kernel.org>
---
drivers/hv/Kconfig | 3 +--
drivers/misc/vmw_vmci/Kconfig | 2 +-
drivers/net/ethernet/microsoft/Kconfig | 2 +-
drivers/soc/tegra/Kconfig | 5 -----
4 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/hv/Kconfig b/drivers/hv/Kconfig
index aa11bcefddf2..36445c2619ed 100644
--- a/drivers/hv/Kconfig
+++ b/drivers/hv/Kconfig
@@ -4,8 +4,7 @@ menu "Microsoft Hyper-V guest support"
config HYPERV
bool "Microsoft Hyper-V core hypervisor support"
- depends on (X86 && X86_LOCAL_APIC && HYPERVISOR_GUEST) \
- || (ARM64 && !CPU_BIG_ENDIAN)
+ depends on (X86 && X86_LOCAL_APIC && HYPERVISOR_GUEST) || ARM64
select PARAVIRT
select X86_HV_CALLBACK_VECTOR if X86
select OF_EARLY_FLATTREE if OF
diff --git a/drivers/misc/vmw_vmci/Kconfig b/drivers/misc/vmw_vmci/Kconfig
index b6d4d7fd686a..ca03cbfdab1e 100644
--- a/drivers/misc/vmw_vmci/Kconfig
+++ b/drivers/misc/vmw_vmci/Kconfig
@@ -5,7 +5,7 @@
config VMWARE_VMCI
tristate "VMware VMCI Driver"
- depends on (X86 || ARM64) && !CPU_BIG_ENDIAN && PCI
+ depends on (X86 || ARM64) && PCI
help
This is VMware's Virtual Machine Communication Interface. It enables
high-speed communication between host and guest in a virtual
diff --git a/drivers/net/ethernet/microsoft/Kconfig b/drivers/net/ethernet/microsoft/Kconfig
index e9be18c92ca5..c4ad3d85875a 100644
--- a/drivers/net/ethernet/microsoft/Kconfig
+++ b/drivers/net/ethernet/microsoft/Kconfig
@@ -18,7 +18,7 @@ if NET_VENDOR_MICROSOFT
config MICROSOFT_MANA
tristate "Microsoft Azure Network Adapter (MANA) support"
depends on PCI_MSI
- depends on X86_64 || (ARM64 && !CPU_BIG_ENDIAN)
+ depends on X86_64 || ARM64
depends on PCI_HYPERV
select AUXILIARY_BUS
select DIMLIB
diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig
index 8b6fdb9ad1ea..318e7b604342 100644
--- a/drivers/soc/tegra/Kconfig
+++ b/drivers/soc/tegra/Kconfig
@@ -102,7 +102,6 @@ config ARCH_TEGRA_210_SOC
config ARCH_TEGRA_186_SOC
bool "NVIDIA Tegra186 SoC"
default ARCH_TEGRA
- depends on !CPU_BIG_ENDIAN
select PINCTRL_TEGRA186
select MAILBOX
select SOC_TEGRA_PMC
@@ -117,7 +116,6 @@ config ARCH_TEGRA_186_SOC
config ARCH_TEGRA_194_SOC
bool "NVIDIA Tegra194 SoC"
default ARCH_TEGRA
- depends on !CPU_BIG_ENDIAN
select MAILBOX
select PINCTRL_TEGRA194
select SOC_TEGRA_PMC
@@ -127,7 +125,6 @@ config ARCH_TEGRA_194_SOC
config ARCH_TEGRA_234_SOC
bool "NVIDIA Tegra234 SoC"
default ARCH_TEGRA
- depends on !CPU_BIG_ENDIAN
select MAILBOX
select PINCTRL_TEGRA234
select SOC_TEGRA_PMC
@@ -137,7 +134,6 @@ config ARCH_TEGRA_234_SOC
config ARCH_TEGRA_238_SOC
bool "NVIDIA Tegra238 SoC"
default ARCH_TEGRA
- depends on !CPU_BIG_ENDIAN
select MAILBOX
select SOC_TEGRA_PMC
help
@@ -152,7 +148,6 @@ config ARCH_TEGRA_241_SOC
config ARCH_TEGRA_264_SOC
bool "NVIDIA Tegra264 SoC"
default ARCH_TEGRA
- depends on !CPU_BIG_ENDIAN
select MAILBOX
select SOC_TEGRA_PMC
help
--
2.55.0.1082.g2b9226bbc0-goog
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v3 00/14] arm64: Remove unused big-endian support
2026-09-18 14:52 [PATCH v3 00/14] arm64: Remove unused big-endian support Will Deacon
` (12 preceding siblings ...)
2026-09-18 14:52 ` [PATCH v3 13/13] drivers: Kconfig: Simplify dependencies on ARM64 && !CPU_BIG_ENDIAN Will Deacon
@ 2026-09-18 16:22 ` Mark Rutland
13 siblings, 0 replies; 15+ messages in thread
From: Mark Rutland @ 2026-09-18 16:22 UTC (permalink / raw)
To: Will Deacon
Cc: linux-arm-kernel, linux-kernel, Arnd Bergmann, Ard Biesheuvel,
Eric Biggers, Daniel Borkmann, Catalin Marinas,
Alexei Starovoitov, Oliver Upton, Herbert Xu, Marc Zyngier
On Fri, Sep 18, 2026 at 03:52:02PM +0100, Will Deacon wrote:
> Hi all,
>
> This is version three of the big-endian removal series previously posted
> here:
>
> v1: https://lore.kernel.org/r/20260811140132.22778-1-will@kernel.org/
> v2: https://lore.kernel.org/r/20260907163726.17104-1-will@kernel.org
>
> Changes since v2 include:
> * Retain support for emitting absolute symbol references with PIE
> * Retain endianness handling on EFI MMU-enabled boot path
> * Invert compile-time endianness check in Hisilicon sec2 driver
> * Added some tags
> Will Deacon (13):
> selftests/arm64: Remove big-endian support
> arm64: bpf: Remove big-endian support from the JIT compiler
> arm64: crypto: Assume a little-endian kernel
> arm64: lib: Assume a little-endian kernel in custom library routines
> arm64: lib: Assume a little-endian kernel in optimised string routines
> arm64: assembler: Remove endianness helper macros
> arm64: vdso32: Always build compat vDSO object as little-endian
> KVM: arm64: Remove support for a big-endian hypervisor object
> arm64: Remove all usage of CONFIG_CPU_BIG_ENDIAN
> arm64: Remove all usage of __AARCH64EB__
> crypto: hisilicon/sec2: Remove check of CONFIG_CPU_LITTLE_ENDIAN
> arm64: Kbuild: Remove vestigial big-endian support
> drivers: Kconfig: Simplify dependencies on ARM64 && !CPU_BIG_ENDIAN
FWIW, for the series:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Mark.
^ permalink raw reply [flat|nested] 15+ messages in thread