From: Mohamed Khalfella <mkhalfella@purestorage.com>
To: Keith Busch <kbusch@kernel.org>, Jens Axboe <axboe@kernel.dk>,
Christoph Hellwig <hch@lst.de>, Sagi Grimberg <sagi@grimberg.me>
Cc: Justin Tee <justin.tee@broadcom.com>,
Naresh Gottumukkala <nareshgottumukkala83@gmail.com>,
Paul Ely <paul.ely@broadcom.com>,
Hannes Reinecke <hare@kernel.org>,
Chaitanya Kulkarni <kch@nvidia.com>,
James Smart <jsmart833426@gmail.com>,
Randy Jennings <randyj@purestorage.com>,
Mohamed Khalfella <mkhalfella@purestorage.com>,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org,
Hannes Reinecke <hare@suse.de>
Subject: [PATCH 01/18] nvmet: Rapid Path Failure Recovery set controller identify fields
Date: Fri, 18 Sep 2026 11:14:01 -0700 [thread overview]
Message-ID: <20260918181614.3947933-2-mkhalfella@purestorage.com> (raw)
In-Reply-To: <20260918181614.3947933-1-mkhalfella@purestorage.com>
TP8028 Rapid Path Failure Recovery defined new fields in controller
identify response. The newly defined fields are:
- CIU (Controller Instance Uniquifier): is an 8bit non-zero value that
is assigned a random value when controller is first created. The value
will be incremented when RDY bit in CSTS register is asserted.
- CIRN (Controller Instance Random Number): is 64bit random value that
gets generated when controller is created. CIRN is regenerated everytime
RDY bit in CSTS register is asserted.
- CCRL (Cross-Controller Reset Limit): is an 8bit value that defines the
maximum number of in-progress controller reset operations. CCRL is
hardcoded to 4 as recommended by TP8028.
These fields are set for non-discovery subsystems only.
Signed-off-by: Mohamed Khalfella <mkhalfella@purestorage.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
---
drivers/nvme/target/admin-cmd.c | 5 +++++
drivers/nvme/target/core.c | 9 +++++++++
drivers/nvme/target/nvmet.h | 2 ++
include/linux/nvme.h | 10 ++++++++--
4 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c
index 7764a3c0195c..bf7c5f5927e3 100644
--- a/drivers/nvme/target/admin-cmd.c
+++ b/drivers/nvme/target/admin-cmd.c
@@ -693,6 +693,11 @@ static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
id->mdts = nvmet_ctrl_mdts(req);
id->cntlid = cpu_to_le16(ctrl->cntlid);
id->ver = cpu_to_le32(ctrl->subsys->ver);
+ if (!nvmet_is_disc_subsys(ctrl->subsys)) {
+ id->ciu = ctrl->ciu;
+ id->cirn = cpu_to_le64(ctrl->cirn);
+ id->ccrl = NVMF_CCR_LIMIT;
+ }
/* XXX: figure out what to do about RTD3R/RTD3 */
id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL);
diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c
index 43871a8f56ca..4c8f30c5ff7e 100644
--- a/drivers/nvme/target/core.c
+++ b/drivers/nvme/target/core.c
@@ -1412,6 +1412,10 @@ static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl)
return;
}
+ if (!nvmet_is_disc_subsys(ctrl->subsys)) {
+ ctrl->ciu = ((u8)(ctrl->ciu + 1)) ? : 1;
+ ctrl->cirn = get_random_u64();
+ }
ctrl->csts = NVME_CSTS_RDY;
/*
@@ -1695,6 +1699,11 @@ struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args)
}
ctrl->cntlid = ret;
+ if (!nvmet_is_disc_subsys(ctrl->subsys)) {
+ ctrl->ciu = get_random_u8() ? : 1;
+ ctrl->cirn = get_random_u64();
+ }
+
ret = nvmet_ctrl_init_pr(ctrl);
if (ret)
goto init_pr_fail;
diff --git a/drivers/nvme/target/nvmet.h b/drivers/nvme/target/nvmet.h
index dbda55895f4f..e3e414ef68d3 100644
--- a/drivers/nvme/target/nvmet.h
+++ b/drivers/nvme/target/nvmet.h
@@ -269,7 +269,9 @@ struct nvmet_ctrl {
uuid_t hostid;
u16 cntlid;
u16 max_qid;
+ u8 ciu;
u32 kato;
+ u64 cirn;
struct nvmet_port *port;
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 91ce434a7e8d..cbaf02b0cf07 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -21,6 +21,8 @@
#define NVMF_TRADDR_SIZE 256
#define NVMF_TSAS_SIZE 256
+#define NVMF_CCR_LIMIT 4
+
#define NVME_DISC_SUBSYS_NAME "nqn.2014-08.org.nvmexpress.discovery"
#define NVME_NSID_ALL 0xffffffff
@@ -328,7 +330,10 @@ struct nvme_id_ctrl {
__le16 crdt1;
__le16 crdt2;
__le16 crdt3;
- __u8 rsvd134[122];
+ __u8 rsvd134[1];
+ __u8 ciu;
+ __le64 cirn;
+ __u8 rsvd144[112];
__le16 oacs;
__u8 acl;
__u8 aerl;
@@ -389,7 +394,8 @@ struct nvme_id_ctrl {
__u8 msdbd;
__u8 rsvd1804[2];
__u8 dctype;
- __u8 rsvd1807[241];
+ __u8 ccrl;
+ __u8 rsvd1808[240];
struct nvme_id_power_state psd[32];
__u8 vs[1024];
};
--
2.55.0
next prev parent reply other threads:[~2026-09-18 18:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-18 18:14 [PATCH 00/18] TP8028 Rapid Path Failure Recovery Mohamed Khalfella
2026-09-18 18:14 ` Mohamed Khalfella [this message]
2026-09-18 18:14 ` [PATCH 02/18] nvmet/debugfs: Export controller CIU and CIRN via debugfs Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 03/18] nvmet: Implement CCR nvme command Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 04/18] nvmet: Implement CCR logpage Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 05/18] nvmet: Send an AEN on CCR completion Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 06/18] nvme: Rapid Path Failure Recovery read controller identify fields Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 07/18] nvme: Introduce FENCING and FENCED controller states Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 08/18] nvme: Implement cross-controller reset recovery Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 09/18] nvme: Implement cross-controller reset completion Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 10/18] nvme-tcp: Use CCR to recover controller that hits an error Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 11/18] nvme-rdma: " Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 12/18] nvme-fc: start error recovery instead of aborting timed out IOs Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 13/18] nvme-fc: perform error recovery directly from ioerr_work Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 14/18] nvme-fc: Use CCR to recover controller that hits an error Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 15/18] nvme-fc: Hold inflight requests while in FENCING state Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 16/18] nvmet: Add support for CQT to nvme target Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 17/18] nvme: Add support for CQT to nvme host Mohamed Khalfella
2026-09-18 18:14 ` [PATCH 18/18] nvme: let controller deletion wait out a fencing window Mohamed Khalfella
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