* [PATCH v2 1/2] dt-bindings: misc: convert axis-fifo binding to YAML
2026-09-19 2:58 ` [PATCH v2 0/2] dt-bindings: misc: convert axis-fifo binding to YAML Daniel28972897
@ 2026-09-19 2:58 ` Daniel28972897
2026-09-19 6:58 ` Krzysztof Kozlowski
2026-09-19 2:59 ` [PATCH v2 2/2] staging: axis-fifo: remove superseded text binding Daniel28972897
2026-09-19 7:47 ` [PATCH v2 0/2] dt-bindings: misc: convert axis-fifo binding to YAML Greg Kroah-Hartman
2 siblings, 1 reply; 7+ messages in thread
From: Daniel28972897 @ 2026-09-19 2:58 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman
Cc: devicetree, linux-kernel, linux-staging, Daniel28972897
Convert drivers/staging/axis-fifo/axis-fifo.txt to a YAML schema
under Documentation/devicetree/bindings/misc/, so it is checked by
dtbs_check and by checkpatch.pl's undocumented-compatible warning.
The FIFO depth properties are documented as being in 32-bit words,
matching the original text binding and the driver's own arithmetic
in axis_fifo_write(), not bytes as an earlier draft of this schema
incorrectly stated.
All properties from the original text binding are preserved,
including ones the driver itself ignores, since they are generated
unconditionally by the Xilinx IP integrator and may be present in
real-world devicetree sources.
Signed-off-by: Daniel28972897 <danyboy28sep@gmail.com>
---
.../bindings/misc/xlnx,axi-fifo-mm-s.yaml | 150 ++++++++++++++++++
1 file changed, 150 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
diff --git a/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml b/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
new file mode 100644
index 000000000000..fffd69b12811
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/xlnx,axi-fifo-mm-s.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx AXI4-Stream FIFO MM S IP core
+
+maintainers:
+ - Daniel <danyboy28sep@gmail.com>
+
+description:
+ The Xilinx AXI4-Stream FIFO MM S IP core has read and write AXI-Stream
+ FIFOs, the contents of which can be accessed from the AXI4 memory-mapped
+ interface. This is useful for transferring data from a processor into
+ the FPGA fabric. See Xilinx PG080 for details.
+
+ Currently the Linux driver supports only store-forward mode with a
+ 32-bit AXI4-Lite interface, and does not support cut-through mode or
+ full (non-lite) AXI4.
+
+properties:
+ compatible:
+ enum:
+ - xlnx,axi-fifo-mm-s-4.1
+ - xlnx,axi-fifo-mm-s-4.2
+ - xlnx,axi-fifo-mm-s-4.3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: interrupt
+
+ xlnx,axi-str-rxd-tdata-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ const: 32
+ description:
+ Width, in bits, of the AXI4-Stream receive data interface. Only 32
+ is currently supported by the driver.
+
+ xlnx,axi-str-txd-tdata-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ const: 32
+ description:
+ Width, in bits, of the AXI4-Stream transmit data interface. Only 32
+ is currently supported by the driver.
+
+ xlnx,rx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Depth, in 32-bit words, of the receive FIFO.
+
+ xlnx,tx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Depth, in 32-bit words, of the transmit FIFO.
+
+ xlnx,use-rx-data:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+ description:
+ Whether the receive data path is present in this IP core instance.
+
+ xlnx,use-tx-data:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+ description:
+ Whether the transmit data path is present in this IP core instance.
+
+ # The following properties are generated by the Xilinx IP integrator
+ # for this core and may be present in real-world devicetrees, but are
+ # not currently read by the Linux driver.
+ xlnx,axi-str-rxd-protocol: true
+ xlnx,axi-str-txc-protocol: true
+ xlnx,axi-str-txc-tdata-width: true
+ xlnx,axi-str-txd-protocol: true
+ xlnx,axis-tdest-width: true
+ xlnx,axis-tid-width: true
+ xlnx,axis-tuser-width: true
+ xlnx,data-interface-type: true
+ xlnx,has-axis-tdest: true
+ xlnx,has-axis-tid: true
+ xlnx,has-axis-tkeep: true
+ xlnx,has-axis-tstrb: true
+ xlnx,has-axis-tuser: true
+ xlnx,rx-fifo-pe-threshold: true
+ xlnx,rx-fifo-pf-threshold: true
+ xlnx,s-axi-id-width: true
+ xlnx,s-axi4-data-width: true
+ xlnx,select-xpm: true
+ xlnx,tx-fifo-pe-threshold: true
+ xlnx,tx-fifo-pf-threshold: true
+ xlnx,use-rx-cut-through: true
+ xlnx,use-tx-ctrl: true
+ xlnx,use-tx-cut-through: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - xlnx,axi-str-rxd-tdata-width
+ - xlnx,axi-str-txd-tdata-width
+ - xlnx,rx-fifo-depth
+ - xlnx,tx-fifo-depth
+ - xlnx,use-rx-data
+ - xlnx,use-tx-data
+
+additionalProperties: false
+
+examples:
+ - |
+ fifo@43c00000 {
+ compatible = "xlnx,axi-fifo-mm-s-4.1";
+ reg = <0x43c00000 0x10000>;
+ interrupt-names = "interrupt";
+ interrupts = <0 29 4>;
+ xlnx,axi-str-rxd-protocol = "XIL_AXI_STREAM_ETH_DATA";
+ xlnx,axi-str-rxd-tdata-width = <32>;
+ xlnx,axi-str-txc-protocol = "XIL_AXI_STREAM_ETH_CTRL";
+ xlnx,axi-str-txc-tdata-width = <32>;
+ xlnx,axi-str-txd-protocol = "XIL_AXI_STREAM_ETH_DATA";
+ xlnx,axi-str-txd-tdata-width = <32>;
+ xlnx,axis-tdest-width = <4>;
+ xlnx,axis-tid-width = <4>;
+ xlnx,axis-tuser-width = <4>;
+ xlnx,data-interface-type = <0>;
+ xlnx,has-axis-tdest = <0>;
+ xlnx,has-axis-tid = <0>;
+ xlnx,has-axis-tkeep = <0>;
+ xlnx,has-axis-tstrb = <0>;
+ xlnx,has-axis-tuser = <0>;
+ xlnx,rx-fifo-depth = <512>;
+ xlnx,rx-fifo-pe-threshold = <2>;
+ xlnx,rx-fifo-pf-threshold = <507>;
+ xlnx,s-axi-id-width = <4>;
+ xlnx,s-axi4-data-width = <32>;
+ xlnx,select-xpm = <0>;
+ xlnx,tx-fifo-depth = <32768>;
+ xlnx,tx-fifo-pe-threshold = <512>;
+ xlnx,tx-fifo-pf-threshold = <32763>;
+ xlnx,use-rx-cut-through = <0>;
+ xlnx,use-rx-data = <0>;
+ xlnx,use-tx-ctrl = <0>;
+ xlnx,use-tx-cut-through = <0>;
+ xlnx,use-tx-data = <1>;
+ };
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 2/2] staging: axis-fifo: remove superseded text binding
2026-09-19 2:58 ` [PATCH v2 0/2] dt-bindings: misc: convert axis-fifo binding to YAML Daniel28972897
2026-09-19 2:58 ` [PATCH v2 1/2] " Daniel28972897
@ 2026-09-19 2:59 ` Daniel28972897
2026-09-19 6:59 ` Krzysztof Kozlowski
2026-09-19 7:47 ` [PATCH v2 0/2] dt-bindings: misc: convert axis-fifo binding to YAML Greg Kroah-Hartman
2 siblings, 1 reply; 7+ messages in thread
From: Daniel28972897 @ 2026-09-19 2:59 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman
Cc: devicetree, linux-kernel, linux-staging, Daniel28972897
This driver's devicetree binding has been converted to
Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml,
which supersedes and duplicates this file.
Signed-off-by: Daniel28972897 <danyboy28sep@gmail.com>
---
drivers/staging/axis-fifo/axis-fifo.txt | 96 -------------------------
1 file changed, 96 deletions(-)
delete mode 100644 drivers/staging/axis-fifo/axis-fifo.txt
diff --git a/drivers/staging/axis-fifo/axis-fifo.txt b/drivers/staging/axis-fifo/axis-fifo.txt
deleted file mode 100644
index 413b81a53202..000000000000
--- a/drivers/staging/axis-fifo/axis-fifo.txt
+++ /dev/null
@@ -1,96 +0,0 @@
-Xilinx AXI-Stream FIFO v4.1 IP core
-
-This IP core has read and write AXI-Stream FIFOs, the contents of which can
-be accessed from the AXI4 memory-mapped interface. This is useful for
-transferring data from a processor into the FPGA fabric. The driver creates
-a character device that can be read/written to with standard
-open/read/write/close.
-
-See Xilinx PG080 document for IP details.
-
-Currently supports only store-forward mode with a 32-bit
-AXI4-Lite interface. DOES NOT support:
- - cut-through mode
- - AXI4 (non-lite)
-
-Required properties:
-- compatible: Should be one of:
- "xlnx,axi-fifo-mm-s-4.1"
- "xlnx,axi-fifo-mm-s-4.2"
- "xlnx,axi-fifo-mm-s-4.3"
-- interrupt-names: Should be "interrupt"
-- interrupt-parent: Should be <&intc>
-- interrupts: Should contain interrupts lines.
-- reg: Should contain registers location and length.
-- xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
-- xlnx,axi-str-rxd-tdata-width: Should be <0x20>
-- xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL"
-- xlnx,axi-str-txc-tdata-width: Should be <0x20>
-- xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
-- xlnx,axi-str-txd-tdata-width: Should be <0x20>
-- xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver)
-- xlnx,axis-tid-width: AXI-Stream TID width (ignored by the driver)
-- xlnx,axis-tuser-width: AXI-Stream TUSER width (ignored by the driver)
-- xlnx,data-interface-type: Should be <0x0> (ignored by the driver)
-- xlnx,has-axis-tdest: Should be <0x0> (this feature isn't supported)
-- xlnx,has-axis-tid: Should be <0x0> (this feature isn't supported)
-- xlnx,has-axis-tkeep: Should be <0x0> (this feature isn't supported)
-- xlnx,has-axis-tstrb: Should be <0x0> (this feature isn't supported)
-- xlnx,has-axis-tuser: Should be <0x0> (this feature isn't supported)
-- xlnx,rx-fifo-depth: Depth of RX FIFO in words
-- xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold
- (ignored by the driver)
-- xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold
- (ignored by the driver)
-- xlnx,s-axi-id-width: Should be <0x4> (ignored by the driver)
-- xlnx,s-axi4-data-width: Should be <0x20> (ignored by the driver)
-- xlnx,select-xpm: Should be <0x0> (ignored by the driver)
-- xlnx,tx-fifo-depth: Depth of TX FIFO in words
-- xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold
- (ignored by the driver)
-- xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold
- (ignored by the driver)
-- xlnx,use-rx-cut-through: Should be <0x0> (this feature isn't supported)
-- xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
-- xlnx,use-tx-ctrl: Should be <0x0> (this feature isn't supported)
-- xlnx,use-tx-cut-through: Should be <0x0> (this feature isn't supported)
-- xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
-
-Example:
-
-axi_fifo_mm_s_0: axi_fifo_mm_s@43c00000 {
- compatible = "xlnx,axi-fifo-mm-s-4.1";
- interrupt-names = "interrupt";
- interrupt-parent = <&intc>;
- interrupts = <0 29 4>;
- reg = <0x43c00000 0x10000>;
- xlnx,axi-str-rxd-protocol = "XIL_AXI_STREAM_ETH_DATA";
- xlnx,axi-str-rxd-tdata-width = <0x20>;
- xlnx,axi-str-txc-protocol = "XIL_AXI_STREAM_ETH_CTRL";
- xlnx,axi-str-txc-tdata-width = <0x20>;
- xlnx,axi-str-txd-protocol = "XIL_AXI_STREAM_ETH_DATA";
- xlnx,axi-str-txd-tdata-width = <0x20>;
- xlnx,axis-tdest-width = <0x4>;
- xlnx,axis-tid-width = <0x4>;
- xlnx,axis-tuser-width = <0x4>;
- xlnx,data-interface-type = <0x0>;
- xlnx,has-axis-tdest = <0x0>;
- xlnx,has-axis-tid = <0x0>;
- xlnx,has-axis-tkeep = <0x0>;
- xlnx,has-axis-tstrb = <0x0>;
- xlnx,has-axis-tuser = <0x0>;
- xlnx,rx-fifo-depth = <0x200>;
- xlnx,rx-fifo-pe-threshold = <0x2>;
- xlnx,rx-fifo-pf-threshold = <0x1fb>;
- xlnx,s-axi-id-width = <0x4>;
- xlnx,s-axi4-data-width = <0x20>;
- xlnx,select-xpm = <0x0>;
- xlnx,tx-fifo-depth = <0x8000>;
- xlnx,tx-fifo-pe-threshold = <0x200>;
- xlnx,tx-fifo-pf-threshold = <0x7ffb>;
- xlnx,use-rx-cut-through = <0x0>;
- xlnx,use-rx-data = <0x0>;
- xlnx,use-tx-ctrl = <0x0>;
- xlnx,use-tx-cut-through = <0x0>;
- xlnx,use-tx-data = <0x1>;
-};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread