* [PATCH 2/2] spi: mt65xx: support wider tick delay field on IPM v59
2026-09-24 3:12 [PATCH 1/2] dt-bindings: spi: mediatek: add mediatek,spi-ipm-v59 compatible Tim Kuo
@ 2026-09-24 3:12 ` Tim Kuo
2026-09-24 12:17 ` [PATCH 1/2] dt-bindings: spi: mediatek: add mediatek,spi-ipm-v59 compatible Mark Brown
1 sibling, 0 replies; 3+ messages in thread
From: Tim Kuo @ 2026-09-24 3:12 UTC (permalink / raw)
To: Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: linux-spi, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Steven Liu, Sky Huang, Tim Kuo
The IPM v59 SPI IP widens the tick delay field in SPI_CMD_REG from
3 bits (bits 24:22) to 7 bits (bits 28:22), so the field width can no
longer be hardcoded in mtk_spi_hw_init().
Add a tick_dly_mask member to struct mtk_spi_compatible and use
field_prep() with the per-SoC mask instead of the open-coded
mask-and-shift, then add a mtk_ipm_v59_compat entry carrying the wider
mask along with a "mediatek,spi-ipm-v59" compatible. Any further changes
related to IPM v59 can be modified based on this compatible.
Existing IPM designs keep GENMASK(24, 22) and are functionally
unchanged.
Signed-off-by: Tim Kuo <Tim.Kuo@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 25 +++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index b845a599f7c6..27ed9be1b121 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -4,6 +4,7 @@
* Author: Leilk Liu <leilk.liu@mediatek.com>
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
@@ -81,6 +82,7 @@
#define SPI_CMD_IPM_GET_TICKDLY_OFFSET 22
#define SPI_CMD_IPM_GET_TICKDLY_MASK GENMASK(24, 22)
+#define SPI_CMD_IPM_V59_GET_TICKDLY_MASK GENMASK(28, 22)
#define PIN_MODE_CFG(x) ((x) / 2)
@@ -120,6 +122,7 @@
* @dma_ext: DMA address extension supported
* @no_need_unprepare: Don't unprepare the SPI clk during runtime
* @ipm_design: Adjust/extend registers to support IPM design IP features
+ * @tick_dly_mask: Tick delay field of SPI_CMD_REG, IPM designs only
*/
struct mtk_spi_compatible {
bool need_pad_sel;
@@ -128,6 +131,7 @@ struct mtk_spi_compatible {
bool dma_ext;
bool no_need_unprepare;
bool ipm_design;
+ u32 tick_dly_mask;
};
/**
@@ -187,6 +191,15 @@ static const struct mtk_spi_compatible mtk_ipm_compat = {
.enhance_timing = true,
.dma_ext = true,
.ipm_design = true,
+ .tick_dly_mask = SPI_CMD_IPM_GET_TICKDLY_MASK,
+};
+
+/* Every SoC with IPM v59 or newer shares this */
+static const struct mtk_spi_compatible mtk_ipm_v59_compat = {
+ .enhance_timing = true,
+ .dma_ext = true,
+ .ipm_design = true,
+ .tick_dly_mask = SPI_CMD_IPM_V59_GET_TICKDLY_MASK,
};
static const struct mtk_spi_compatible mt6765_compat = {
@@ -226,6 +239,7 @@ static const struct mtk_spi_compatible mt6991_compat = {
.enhance_timing = true,
.dma_ext = true,
.ipm_design = true,
+ .tick_dly_mask = SPI_CMD_IPM_GET_TICKDLY_MASK,
};
/*
@@ -241,6 +255,9 @@ static const struct of_device_id mtk_spi_of_match[] = {
{ .compatible = "mediatek,spi-ipm",
.data = (void *)&mtk_ipm_compat,
},
+ { .compatible = "mediatek,spi-ipm-v59",
+ .data = (void *)&mtk_ipm_v59_compat,
+ },
{ .compatible = "mediatek,mt2701-spi",
.data = (void *)&mtk_common_compat,
},
@@ -366,7 +383,7 @@ static int mtk_spi_hw_init(struct spi_controller *host,
struct spi_device *spi)
{
u16 cpha, cpol;
- u32 reg_val;
+ u32 reg_val, mask;
struct mtk_chip_config *chip_config = spi->controller_data;
struct mtk_spi *mdata = spi_controller_get_devdata(host);
@@ -443,10 +460,10 @@ static int mtk_spi_hw_init(struct spi_controller *host,
/* tick delay */
if (mdata->dev_comp->enhance_timing) {
if (mdata->dev_comp->ipm_design) {
+ mask = mdata->dev_comp->tick_dly_mask;
reg_val = readl(mdata->base + SPI_CMD_REG);
- reg_val &= ~SPI_CMD_IPM_GET_TICKDLY_MASK;
- reg_val |= ((chip_config->tick_delay & 0x7)
- << SPI_CMD_IPM_GET_TICKDLY_OFFSET);
+ reg_val &= ~mask;
+ reg_val |= field_prep(mask, chip_config->tick_delay);
writel(reg_val, mdata->base + SPI_CMD_REG);
} else {
reg_val = readl(mdata->base + SPI_CFG1_REG);
--
2.45.2
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 1/2] dt-bindings: spi: mediatek: add mediatek,spi-ipm-v59 compatible
2026-09-24 3:12 [PATCH 1/2] dt-bindings: spi: mediatek: add mediatek,spi-ipm-v59 compatible Tim Kuo
2026-09-24 3:12 ` [PATCH 2/2] spi: mt65xx: support wider tick delay field on IPM v59 Tim Kuo
@ 2026-09-24 12:17 ` Mark Brown
1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2026-09-24 12:17 UTC (permalink / raw)
To: Tim Kuo
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, linux-spi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, Steven Liu, Sky Huang
[-- Attachment #1: Type: text/plain, Size: 580 bytes --]
On Thu, Sep 24, 2026 at 11:12:10AM +0800, Tim Kuo wrote:
> The IPM v59 SPI IP differs from earlier IPM designs, most visibly in the
> tick delay field of SPI_CMD_REG, so it needs its own fallback compatible
> rather than reusing "mediatek,spi-ipm".
Please submit patches using subject lines reflecting the style for the
subsystem, this makes it easier for people to identify relevant patches.
Look at what existing commits in the area you're changing are doing and
make sure your subject lines visually resemble what they're doing.
There's no need to resubmit to fix this alone.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread