* [PATCH v3 0/2] drm/i915/dp: Fix MST PBN accounting
[not found] <20260922092647.2263962-1-xiaolu.xie@intel.com>
@ 2026-09-24 9:43 ` Xiao Lu
2026-09-24 9:43 ` [PATCH v3 1/2] drm/i915/dp: fix PBN in ALLOCATE_PAYLOAD request to use actual video bandwidth Xiao Lu
2026-09-24 9:43 ` [PATCH v3 2/2] drm/dp_mst: Track allocated_pbn from ALLOCATE_PAYLOAD down-reply Xiao Lu
0 siblings, 2 replies; 3+ messages in thread
From: Xiao Lu @ 2026-09-24 9:43 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, dri-devel, linux-kernel, jani.nikula, rodrigo.vivi,
joonas.lahtinen, tursulin, airlied, simona, maarten.lankhorst,
mripard, tzimmermann, Xiao Lu
Use the raw video PBN in ALLOCATE_PAYLOAD requests while keeping the
TU-aligned PBN for source hardware programming. Also track the PBN
actually allocated by downstream branches and use it in later bandwidth
checks.
The series was tested with a three-display PS8650 MST daisy chain.
Changes in v3:
- Preserve allocated_pbn when recalculating an active payload; clear it
only when releasing the payload.
- Patch 1 is unchanged.
Xiao Lu (2):
drm/i915/dp: fix PBN in ALLOCATE_PAYLOAD request to use actual video
bandwidth
drm/dp_mst: Track allocated_pbn from ALLOCATE_PAYLOAD down-reply
drivers/gpu/drm/display/drm_dp_mst_topology.c | 17 +++++++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 33 ++++++++++++++-----
include/drm/display/drm_dp_mst_helper.h | 10 ++++++
3 files changed, 46 insertions(+), 14 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v3 1/2] drm/i915/dp: fix PBN in ALLOCATE_PAYLOAD request to use actual video bandwidth
2026-09-24 9:43 ` [PATCH v3 0/2] drm/i915/dp: Fix MST PBN accounting Xiao Lu
@ 2026-09-24 9:43 ` Xiao Lu
2026-09-24 9:43 ` [PATCH v3 2/2] drm/dp_mst: Track allocated_pbn from ALLOCATE_PAYLOAD down-reply Xiao Lu
1 sibling, 0 replies; 3+ messages in thread
From: Xiao Lu @ 2026-09-24 9:43 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, dri-devel, linux-kernel, jani.nikula, rodrigo.vivi,
joonas.lahtinen, tursulin, airlied, simona, maarten.lankhorst,
mripard, tzimmermann, Xiao Lu
When computing the number of time slots for an MST stream,
intel_dp_mtp_tu_compute_config() was passing the TU-aligned PBN value
to drm_dp_atomic_find_time_slots() instead of the actual video
bandwidth PBN.
The aligned PBN is computed by rounding up the raw video bandwidth to
the nearest TU boundary and aligning to the hardware TU granularity
(4 / lane_count). This inflated PBN is then used as the requested PBN
in the ALLOCATE_PAYLOAD sideband message, causing the MST core's
bandwidth check in drm_dp_mst_atomic_check_port_bw_limit() to
incorrectly reject configurations that should fit within the available
link bandwidth.
Per DP v2.1b Section 2.6.4.1, the PBN in an ALLOCATE_PAYLOAD request
represents the video stream bandwidth and is independent of the source
TX link rate. The same video stream should result in the same PBN value
regardless of the link rate used on the source side. Passing the
TU-aligned PBN violates this requirement, as it incorporates link-rate-
specific TU granularity into the payload bandwidth value.
This was observed in a 3-display MST daisy-chain topology (PS8650 MST
hub → ViewSonic VP2468 × 2 → Lenovo Pro 27UD-10) where switching
Lenovo to 4K@60Hz failed with -ENOSPC despite the actual video
bandwidth fitting within the DFP link capacity. The inflated PBN of
the VP2468 streams (537 instead of the correct 532 for 1920x1080@60Hz)
consumed excess slots, leaving insufficient room for the 4K@60Hz stream.
Fix this by separating raw_pbn (the actual video bandwidth used for
payload allocation and ALLOCATE_PAYLOAD) from the aligned pbn (used
only for TU hardware programming). Pass raw_pbn to
drm_dp_atomic_find_time_slots() so that bandwidth accounting in the
MST core reflects the true stream requirements.
Depends-on: <20260908132844.2309047-1-xiaolu.xie@intel.com>
("drm/dp/mst: track allocated_pbn from ALLOCATE_PAYLOAD reply")
The companion patch above tracks the allocated_pbn returned in the
ALLOCATE_PAYLOAD reply from the branch device. Together with this fix,
the correct raw_pbn is used as the requested PBN in the
ALLOCATE_PAYLOAD request, and the allocated_pbn from the reply is used
for bandwidth limit checks. This pairing ensures that both the request
and the check accurately reflect the actual video stream bandwidth
and any per-hop capacity constraints along the MST path.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 33 +++++++++++++++------
1 file changed, 24 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0c362784a..31e846aad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -350,6 +350,7 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
if (is_mst) {
int remote_bw_overhead;
int remote_tu;
+ int raw_pbn;
fixed20_12 pbn;
remote_bw_overhead = intel_dp_mst_bw_overhead(crtc_state,
@@ -369,9 +370,10 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
* crtc_state->dp_m_n.tu), provided that the driver doesn't
* enable SSC on the corresponding link.
*/
- pbn.full = dfixed_const(intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
- link_bpp_x16,
- remote_bw_overhead));
+ raw_pbn = intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
+ link_bpp_x16,
+ remote_bw_overhead);
+ pbn.full = dfixed_const(raw_pbn);
remote_tu = DIV_ROUND_UP(pbn.full, mst_state->pbn_div.full);
/*
@@ -384,11 +386,10 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
remote_tu = ALIGN(remote_tu, 4 / crtc_state->lane_count);
/*
- * Also align PBNs accordingly, since MST core will derive its
- * own copy of TU from the PBN in drm_dp_atomic_find_time_slots().
- * The above comment about the difference between the PBN
- * allocated for the whole path and the TUs allocated for the
- * first branch device's link also applies here.
+ * Keep the PBN corresponding to the aligned hardware TU separate
+ * from raw_pbn. The aligned value describes the TU granularity of
+ * the first downstream branch link; raw_pbn is the video bandwidth
+ * value passed to the MST payload allocator and ALLOCATE_PAYLOAD.
*/
pbn.full = remote_tu * mst_state->pbn_div.full;
@@ -397,7 +398,21 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst.mgr,
connector->mst.port,
- dfixed_trunc(pbn));
+ raw_pbn);
+
+ drm_dbg_kms(display->drm,
+ "MST TU %s pipe %c: clock=%d lanes=%d bpp=%d link_bpp=%d fec=%d\n",
+ connector->base.name,
+ pipe_name(to_intel_crtc(crtc_state->uapi.crtc)->pipe),
+ crtc_state->port_clock, crtc_state->lane_count,
+ fxp_q4_to_int(bpp_x16), fxp_q4_to_int(link_bpp_x16),
+ crtc_state->fec_enable);
+ drm_dbg_kms(display->drm,
+ "MST TU %s: overhead=%d raw_pbn=%d pbn=%d pbn_div=%d tu=%d slots=%d full_pbn=%d\n",
+ connector->base.name,
+ remote_bw_overhead, raw_pbn,
+ dfixed_trunc(pbn), dfixed_trunc(mst_state->pbn_div),
+ remote_tu, slots, connector->mst.port->full_pbn);
/* TODO: Check this already in drm_dp_atomic_find_time_slots(). */
if (slots > mst_state->total_avail_slots)
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v3 2/2] drm/dp_mst: Track allocated_pbn from ALLOCATE_PAYLOAD down-reply
2026-09-24 9:43 ` [PATCH v3 0/2] drm/i915/dp: Fix MST PBN accounting Xiao Lu
2026-09-24 9:43 ` [PATCH v3 1/2] drm/i915/dp: fix PBN in ALLOCATE_PAYLOAD request to use actual video bandwidth Xiao Lu
@ 2026-09-24 9:43 ` Xiao Lu
1 sibling, 0 replies; 3+ messages in thread
From: Xiao Lu @ 2026-09-24 9:43 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, dri-devel, linux-kernel, jani.nikula, rodrigo.vivi,
joonas.lahtinen, tursulin, airlied, simona, maarten.lankhorst,
mripard, tzimmermann, Xiao Lu
The ALLOCATE_PAYLOAD reply may report a larger PBN than requested
when an intermediate branch applies its own constraints.
Store the reported PBN and use the larger of requested and allocated
PBN for bandwidth checks. Preserve it when recalculating time slots,
since clearing it there makes the next atomic check underestimate
active payloads. Clear it only when releasing the payload.
Signed-off-by: Xiao Lu <xiaolu.xie@intel.com>
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 17 ++++++++++++-----
include/drm/display/drm_dp_mst_helper.h | 10 ++++++++++
2 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 7ce9e2127..86a42c5e2 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3120,6 +3120,7 @@ drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
static int drm_dp_payload_send_msg(struct drm_dp_mst_topology_mgr *mgr,
struct drm_dp_mst_port *port,
+ struct drm_dp_mst_atomic_payload *payload,
int id,
int pbn)
{
@@ -3166,10 +3167,14 @@ static int drm_dp_payload_send_msg(struct drm_dp_mst_topology_mgr *mgr,
*/
ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
if (ret > 0) {
- if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK)
+ if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) {
ret = -EINVAL;
- else
+ } else {
+ if (payload)
+ payload->allocated_pbn =
+ txmsg->reply.u.allocate_payload.allocated_pbn;
ret = 0;
+ }
}
kfree(txmsg);
fail_put:
@@ -3285,7 +3290,7 @@ static int drm_dp_create_payload_to_remote(struct drm_dp_mst_topology_mgr *mgr,
if (!port)
return -EIO;
- ret = drm_dp_payload_send_msg(mgr, port, payload->vcpi, payload->pbn);
+ ret = drm_dp_payload_send_msg(mgr, port, payload, payload->vcpi, payload->pbn);
drm_dp_mst_topology_put_port(port);
return ret;
}
@@ -3298,7 +3303,7 @@ static void drm_dp_destroy_payload_at_remote_and_dfp(struct drm_dp_mst_topology_
/* it's okay for these to fail */
if (payload->payload_allocation_status == DRM_DP_MST_PAYLOAD_ALLOCATION_REMOTE) {
- drm_dp_payload_send_msg(mgr, payload->port, payload->vcpi, 0);
+ drm_dp_payload_send_msg(mgr, payload->port, NULL, payload->vcpi, 0);
payload->payload_allocation_status = DRM_DP_MST_PAYLOAD_ALLOCATION_DFP;
}
@@ -4575,6 +4580,7 @@ int drm_dp_atomic_release_time_slots(struct drm_atomic_commit *state,
drm_dbg_atomic(mgr->dev, "[MST PORT:%p] TU %d -> 0\n", port, payload->time_slots);
if (!payload->delete) {
payload->pbn = 0;
+ payload->allocated_pbn = 0;
payload->delete = true;
if (payload->vcpi > 0)
topology_state->payload_mask &= ~BIT(payload->vcpi - 1);
@@ -4670,6 +4676,7 @@ void drm_dp_mst_atomic_wait_for_dependencies(struct drm_atomic_commit *state)
new_payload = drm_atomic_get_mst_payload_state(new_mst_state,
old_payload->port);
new_payload->vc_start_slot = old_payload->vc_start_slot;
+ new_payload->allocated_pbn = old_payload->allocated_pbn;
new_payload->payload_allocation_status =
old_payload->payload_allocation_status;
}
@@ -5352,7 +5359,7 @@ drm_dp_mst_atomic_check_port_bw_limit(struct drm_dp_mst_port *port,
return -EINVAL;
}
- pbn_used = payload->pbn;
+ pbn_used = max(payload->pbn, payload->allocated_pbn);
} else {
pbn_used = drm_dp_mst_atomic_check_mstb_bw_limit(port->mstb,
state,
diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
index 27658bfb5..1a9430a62 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -572,6 +572,16 @@ struct drm_dp_mst_atomic_payload {
int time_slots;
/** @pbn: The payload bandwidth for this payload */
int pbn;
+ /**
+ * @allocated_pbn: The payload bandwidth actually confirmed by the
+ * branch device in the ALLOCATE_PAYLOAD reply. Each MST branch along
+ * the path overrides this field to the maximum of the requested and
+ * its own constrained value, so the value received by the source
+ * reflects the tightest bottleneck along the entire path.
+ * Used instead of @pbn for bandwidth limit checks so that the source
+ * accounts for any per-hop adjustments made by intermediate branches.
+ */
+ int allocated_pbn;
/** @delete: Whether or not we intend to delete this payload during this atomic commit */
bool delete : 1;
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-09-24 9:45 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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[not found] <20260922092647.2263962-1-xiaolu.xie@intel.com>
2026-09-24 9:43 ` [PATCH v3 0/2] drm/i915/dp: Fix MST PBN accounting Xiao Lu
2026-09-24 9:43 ` [PATCH v3 1/2] drm/i915/dp: fix PBN in ALLOCATE_PAYLOAD request to use actual video bandwidth Xiao Lu
2026-09-24 9:43 ` [PATCH v3 2/2] drm/dp_mst: Track allocated_pbn from ALLOCATE_PAYLOAD down-reply Xiao Lu
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