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From: Kyle Hendry via B4 Relay <devnull+khendry.reliablecontrols.com@kernel.org>
To: "Clément Léger" <clement.leger@bootlin.com>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
	 linux-kernel@vger.kernel.org,
	Kyle Hendry <khendry@reliablecontrols.com>
Subject: [PATCH net-next v2 2/3] net: pcs: rzn1-miic: Fix miic register initialization loop
Date: Mon, 28 Sep 2026 14:19:04 -0700	[thread overview]
Message-ID: <20260928-miic-validate-dtb-v2-2-1ee3d33748e9@reliablecontrols.com> (raw)
In-Reply-To: <20260928-miic-validate-dtb-v2-0-1ee3d33748e9@reliablecontrols.com>

From: Kyle Hendry <khendry@reliablecontrols.com>

The function to write default values to miic registers was looping from
zero to miic_port_max, which might not cover all ports depending on SoC
numbering. Determine the port count from SoC data and loop over that.

Fixes: c112520de041758e ("net: pcs: rzn1-miic: move port range handling into SoC data")
Signed-off-by: Kyle Hendry <khendry@reliablecontrols.com>
---
 drivers/net/pcs/pcs-rzn1-miic.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c
index df70309c2d97..9e830932ce49 100644
--- a/drivers/net/pcs/pcs-rzn1-miic.c
+++ b/drivers/net/pcs/pcs-rzn1-miic.c
@@ -520,6 +520,7 @@ EXPORT_SYMBOL(miic_destroy);
 static int miic_init_hw(struct miic *miic, u32 cfg_mode)
 {
 	u8 sw_mode_mask = miic->of_data->sw_mode_mask;
+	int num_ports;
 	int port;
 
 	/* Unlock write access to accessory registers (cf datasheet). If this
@@ -535,7 +536,10 @@ static int miic_init_hw(struct miic *miic, u32 cfg_mode)
 	miic_reg_writel(miic, MIIC_MODCTRL,
 			((cfg_mode << __ffs(sw_mode_mask)) & sw_mode_mask));
 
-	for (port = 0; port < miic->of_data->miic_port_max; port++) {
+	num_ports = miic->of_data->miic_port_max -
+		miic->of_data->miic_port_start + 1;
+
+	for (port = 0; port < num_ports; port++) {
 		miic_converter_enable(miic, port, 0);
 		/* Disable speed/duplex control from these registers, datasheet
 		 * says switch registers should be used to setup switch port

-- 
2.43.0



  parent reply	other threads:[~2026-09-28 21:19 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-28 21:19 [PATCH net-next v2 0/3] net: pcs: rzn1-miic: Validate dtb configuration values Kyle Hendry via B4 Relay
2026-09-28 21:19 ` [PATCH net-next v2 1/3] net: pcs: rzn1-miic: Fix port numbering on RZ/T2H Kyle Hendry via B4 Relay
2026-09-28 21:19 ` Kyle Hendry via B4 Relay [this message]
2026-09-28 21:19 ` [PATCH net-next v2 3/3] net: pcs: rzn1-miic: Validate dtb configuration values Kyle Hendry via B4 Relay
2026-09-28 21:25 ` [PATCH net-next v2 0/3] " netdev-bot+sinfo
2026-09-29 18:13   ` Kyle Hendry

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