[PATCH 0/2] clk: qcom: sdm660: keep USB across suspend, give mdss_axi_clk its parent

[PATCH 0/2] clk: qcom: sdm660: keep USB across suspend, give mdss_axi_clk its parent

[Fabricio Akio via B4 Relay]

Two independent fixes to the SDM660 clock controllers, found while
bringing up the Motorola Moto X4 (payton, SDM630).

The first keeps the USB GDSC in retention across system suspend, as
msm8996, msm8998 and sm6375 already do. Switching it off loses the
DWC3 glue's QSCRATCH configuration, and USB does not come back after
resume.

The second sets num_parents on mdss_axi_clk. Without it the branch is
registered with no parent, reports 0 Hz, and enabling it takes no
reference on axi_clk_src.

Tested on a Motorola Moto X4 (XT1900-6) with the sdm660-mainline 7.2.3
tree, where its board file lives. Without the first patch the USB
gadget is gone after an RTC-woken suspend; with it, it re-enumerates
over repeated cycles. With the second, clk_summary shows mdss_axi_clk
at 384 MHz under axi_clk_src instead of 0 Hz with no parent. Both
apply unchanged to next-20260928.

---
Fabricio Akio (2):
      clk: qcom: gcc-sdm660: Keep the USB GDSC in retention
      clk: qcom: mmcc-sdm660: set num_parents on mdss_axi_clk

 drivers/clk/qcom/gcc-sdm660.c  | 3 ++-
 drivers/clk/qcom/mmcc-sdm660.c | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)
---
base-commit: 6375e61c01e93e35ee7acd336a689ac1fae4b509
change-id: 20260928-sdm660-clk-fixes-985d73f9d083

Best regards,
--  
Fabricio Akio <fabricioakio@gmail.com>

[PATCH 1/2] clk: qcom: gcc-sdm660: Keep the USB GDSC in retention

[Fabricio Akio via B4 Relay]

From: Fabricio Akio <fabricioakio@gmail.com>

The DWC3 glue writes its QSCRATCH configuration only at probe. When
system suspend switches usb_30_gdsc off, that configuration is lost
and on resume the core fails to enable endpoint 0. Keep the GDSC in
retention, as is already done on:

  commit 78a2f2a04fb5 ("clk: qcom: gcc-msm8996: Update the .pwrsts for
  usb gdsc")
  commit 83fddbcc8337 ("clk: qcom: gcc-msm8998: Update the .pwrsts for
  usb gdsc")

This change should be reverted when a proper suspend sequence is
implemented in the USB drivers.

Signed-off-by: Fabricio Akio <fabricioakio@gmail.com>
---
 drivers/clk/qcom/gcc-sdm660.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index 20253a06a583..5d00f1fd4d53 100644
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -2302,7 +2302,8 @@ static struct gdsc usb_30_gdsc = {
 	.pd = {
 		.name = "usb_30_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
+	/* TODO: Change to OFF_ON when USB drivers get proper suspend support */
+	.pwrsts = PWRSTS_RET_ON,
 	.flags = VOTABLE,
 };
 

-- 
2.55.0

[PATCH 2/2] clk: qcom: mmcc-sdm660: set num_parents on mdss_axi_clk

[Fabricio Akio via B4 Relay]

From: Fabricio Akio <fabricioakio@gmail.com>

mdss_axi_clk names axi_clk_src in parent_hws but leaves num_parents at
zero, so the array is never read and the branch registers as a root
clock -- no rate of its own, and no reference on its parent:

  axi_clk_src   en=0 rate=384000000
  mdss_axi_clk  en=1 rate=0

It is the only branch in this driver missing the field.

Fixes: 5db3ae8b33de ("clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver")
Signed-off-by: Fabricio Akio <fabricioakio@gmail.com>
---
 drivers/clk/qcom/mmcc-sdm660.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c
index 9f8b8e29fa0f..433f5954eb91 100644
--- a/drivers/clk/qcom/mmcc-sdm660.c
+++ b/drivers/clk/qcom/mmcc-sdm660.c
@@ -2064,6 +2064,7 @@ static struct clk_branch mdss_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mdss_axi_clk",
 			.parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw },
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},

-- 
2.55.0