From: Krzysztof Kozlowski <krzk@kernel.org>
To: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Cc: Abel Vesa <abel.vesa@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Abel Vesa <abelvesa@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Taniya Das <taniya.das@oss.qualcomm.com>,
Jagadeesh Kona <quic_jkona@quicinc.com>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sm8750: Fix videocc clock inputs
Date: Tue, 29 Sep 2026 10:06:07 +0200 [thread overview]
Message-ID: <20260929-smart-hairy-puma-e4cf8e@quoll> (raw)
In-Reply-To: <araTYLZoYUKyQw5b@QCOM-aGQu4IUr3Y>
On Fri, Sep 25, 2026 at 11:29:36PM +0800, Shawn Guo wrote:
> On Fri, Sep 25, 2026 at 12:47:16PM +0300, Abel Vesa wrote:
> > On 26-09-25 00:11:52, Shawn Guo wrote:
> > > The videocc node passes GCC_VIDEO_AHB_CLK as its second input and stops
> > > there. videocc-sm8750.c declares its DT inputs as DT_BI_TCXO,
> > > DT_BI_TCXO_AO and DT_SLEEP_CLK, so the second input is the always-on
> > > board XO rather than an AHB clock, and the sleep clock is missing
> > > entirely.
> > >
> > > The missing third input leaves video_cc_sleep_clk_src unable to resolve
> > > its parent, so it registers as an orphan clock and cannot be rated.
> > > The AHB phandle in the always-on XO slot is not resolved by the driver
> > > today, but it implies a parent relationship the hardware does not have.
> > >
> > > Pass bi_tcxo_ao_div2 and the board sleep clock instead.
> >
> > So videocc can still function properly without the GCC video AHB clock then?
>
> I do not have a sm8750 device to test, but I did verify the same change
> on Nord, and videocc can still function properly.
>
> Dropping gcc_video_ahb_clk as a videocc input clock shouldn't break
> sm8750 videocc from what I can see.
>
> - The AHB clock isn't a videocc input at all. The videocc clocks array is
Why is not input? You keep using in the commit msg and here only driver
arguments. This is not an argument for hardware change.
> positional and the driver maps index 0/1/2 to
> DT_BI_TCXO/DT_BI_TCXO_AO/DT_SLEEP_CLK.
>
> - gcc_video_ahb_clk cannot be consumed anyway. gcc_sm8750_probe() leaves
> it always enabled in probe and never registers it as a clk at all. So
Again driver argument. So if driver did not leave it enabled, then
hardware would need it?
Best regards,
Krzysztof
prev parent reply other threads:[~2026-09-29 8:06 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 16:11 [PATCH 0/3] qcom: videocc: Fix sleep clock on Glymur/SM8750 Shawn Guo
2026-09-24 16:11 ` [PATCH 1/3] dt-bindings: clock: qcom,sm8450-videocc: Fix clock inputs for Glymur Shawn Guo
2026-09-29 7:57 ` Krzysztof Kozlowski
2026-09-29 14:08 ` Shawn Guo
2026-09-24 16:11 ` [PATCH 2/3] arm64: dts: qcom: glymur: Add videocc sleep clock Shawn Guo
2026-09-25 9:48 ` Abel Vesa
2026-09-25 15:35 ` Shawn Guo
2026-09-25 15:49 ` Jagadeesh Kona
2026-09-26 0:18 ` Shawn Guo
2026-09-24 16:11 ` [PATCH 3/3] arm64: dts: qcom: sm8750: Fix videocc clock inputs Shawn Guo
2026-09-25 9:47 ` Abel Vesa
2026-09-25 15:29 ` Shawn Guo
2026-09-29 8:06 ` Krzysztof Kozlowski [this message]
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