From: Divyamani Tripathi <divyamani.tripathi@intel.com>
To: linux-kernel@vger.kernel.org
Cc: sakari.ailus@linux.intel.com, antti.laakso@linux.intel.com,
sarang.sapre@intel.com, manik.bajpai@intel.com,
Divyamani Tripathi <divyamani.tripathi@intel.com>
Subject: [PATCH 2/7] media: ipu6: add IS_IPU8() macro
Date: Wed, 30 Sep 2026 12:01:43 +0300 [thread overview]
Message-ID: <20260930090148.3980652-3-divyamani.tripathi@intel.com> (raw)
In-Reply-To: <20260930090148.3980652-1-divyamani.tripathi@intel.com>
Add IPU_VERSION_8 and an IS_IPU8() accessor mirroring
IS_IPU7()/IS_IPU7P5(), plus the IPU8 firmware/model name defines, as
the baseline for the rest of this series.
Signed-off-by: Divyamani Tripathi <divyamani.tripathi@intel.com>
---
drivers/media/pci/intel/ipu6/ipu6.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/media/pci/intel/ipu6/ipu6.h b/drivers/media/pci/intel/ipu6/ipu6.h
index 72c5063d5198..20ffbb4a9934 100644
--- a/drivers/media/pci/intel/ipu6/ipu6.h
+++ b/drivers/media/pci/intel/ipu6/ipu6.h
@@ -18,6 +18,7 @@ struct ipu6_bus_device;
#define IPU6_MEDIA_DEV_MODEL_NAME "ipu6"
#define IPU7_MEDIA_DEV_MODEL_NAME "ipu7"
#define IPU7P5_MEDIA_DEV_MODEL_NAME "ipu7.5"
+#define IPU8_MEDIA_DEV_MODEL_NAME "ipu8"
#define IPU6SE_FIRMWARE_NAME "intel/ipu/ipu6se_fw.bin"
#define IPU6EP_FIRMWARE_NAME "intel/ipu/ipu6ep_fw.bin"
@@ -26,6 +27,7 @@ struct ipu6_bus_device;
#define IPU6EPADLN_FIRMWARE_NAME "intel/ipu/ipu6epadln_fw.bin"
#define IPU7_FIRMWARE_NAME "intel/ipu/ipu7_fw.bin"
#define IPU7P5_FIRMWARE_NAME "intel/ipu/ipu7ptl_fw.bin"
+#define IPU8_FIRMWARE_NAME "intel/ipu/ipu8_fw.bin"
#define IPU_VERSION_6 BIT(0) /* TGL */
#define IPU_VERSION_6SE BIT(1) /* JSL */
@@ -33,6 +35,7 @@ struct ipu6_bus_device;
#define IPU_VERSION_6EP_MTL BIT(3) /* MTL */
#define IPU_VERSION_7 BIT(4) /* LNL */
#define IPU_VERSION_7P5 BIT(5) /* PTL */
+#define IPU_VERSION_8 BIT(6) /* NVL */
#define IS_IPU6_TGL(isp) ((isp)->hw_ver & IPU_VERSION_6)
#define IS_IPU6SE(isp) ((isp)->hw_ver & IPU_VERSION_6SE)
@@ -42,6 +45,7 @@ struct ipu6_bus_device;
(IPU_VERSION_7 | IPU_VERSION_7P5))
#define IS_IPU7_MTL(isp) ((isp)->hw_ver & IPU_VERSION_7)
#define IS_IPU7P5(isp) ((isp)->hw_ver & IPU_VERSION_7P5)
+#define IS_IPU8(isp) ((isp)->hw_ver & IPU_VERSION_8)
/*
* ISYS DMA can overshoot. For higher resolutions over allocation is one line
--
2.43.0
next prev parent reply other threads:[~2026-09-30 9:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 9:01 [PATCH 0/7] media: ipu6: add IPU8 support Divyamani Tripathi
2026-09-30 9:01 ` [PATCH 1/7] media: ipu6: update ipu7 InSys ABI to 1.2.1.20251215_224531 Divyamani Tripathi
2026-09-30 9:01 ` Divyamani Tripathi [this message]
2026-09-30 9:01 ` [PATCH 3/7] media: ipu6: add IPU8 InSys ABI 1.0.14 support Divyamani Tripathi
2026-09-30 9:01 ` [PATCH 4/7] media: ipu6: make ipu7 gpreg stride configurable as per IPU version Divyamani Tripathi
2026-09-30 9:01 ` [PATCH 5/7] media: ipu6: add IPU8 isys chip/MMU enablement Divyamani Tripathi
2026-09-30 9:01 ` [PATCH 6/7] media: ipu6: add IPU8 psys MMU table and PLL power sequencing Divyamani Tripathi
2026-09-30 9:01 ` [PATCH 7/7] media: ipu6: add PCI ID for IPU8 Divyamani Tripathi
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