From: Archit Anant <architanant5@gmail.com>
To: jic23@kernel.org
Cc: dlechner@baylibre.com, andy@kernel.org, nuno.sa@analog.com,
u.kleine-koenig@baylibre.com, linux-iio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Archit Anant <architanant5@gmail.com>
Subject: [PATCH v5 10/10] iio: adc: ti-ads1015: replace custom shift macros with FIELD_PREP/GET
Date: Wed, 30 Sep 2026 22:42:04 +0530 [thread overview]
Message-ID: <20260930171204.12863-11-architanant5@gmail.com> (raw)
In-Reply-To: <20260930171204.12863-1-architanant5@gmail.com>
The driver currently uses custom _SHIFT macros and manual bitwise
operations to read and write to the configuration register.
Modernize the bitwise logic by replacing all manual shifts with the
standard FIELD_PREP() and FIELD_GET() macros from <linux/bitfield.h>.
This improves readability and prevents potential bitwise errors.
Remove the now-unused _SHIFT macros from the top of the file.
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Archit Anant <architanant5@gmail.com>
---
drivers/iio/adc/ti-ads1015.c | 68 ++++++++++++++++--------------------
1 file changed, 30 insertions(+), 38 deletions(-)
diff --git a/drivers/iio/adc/ti-ads1015.c b/drivers/iio/adc/ti-ads1015.c
index 2e8f89d16586..cf94e9e6a6d2 100644
--- a/drivers/iio/adc/ti-ads1015.c
+++ b/drivers/iio/adc/ti-ads1015.c
@@ -11,6 +11,7 @@
* * 0x4B - ADDR connected to SCL
*/
+#include <linux/bitfield.h>
#include <linux/cleanup.h>
#include <linux/delay.h>
#include <linux/i2c.h>
@@ -39,15 +40,6 @@
#define ADS1015_LO_THRESH_REG 0x02
#define ADS1015_HI_THRESH_REG 0x03
-#define ADS1015_CFG_COMP_QUE_SHIFT 0
-#define ADS1015_CFG_COMP_LAT_SHIFT 2
-#define ADS1015_CFG_COMP_POL_SHIFT 3
-#define ADS1015_CFG_COMP_MODE_SHIFT 4
-#define ADS1015_CFG_DR_SHIFT 5
-#define ADS1015_CFG_MOD_SHIFT 8
-#define ADS1015_CFG_PGA_SHIFT 9
-#define ADS1015_CFG_MUX_SHIFT 12
-
#define ADS1015_CFG_COMP_QUE_MASK GENMASK(1, 0)
#define ADS1015_CFG_COMP_LAT_MASK BIT(2)
#define ADS1015_CFG_COMP_POL_MASK BIT(3)
@@ -408,15 +400,16 @@ int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
dr = data->channel_data[chan].data_rate;
mask = ADS1015_CFG_MUX_MASK | ADS1015_CFG_PGA_MASK |
ADS1015_CFG_DR_MASK;
- cfg = chan << ADS1015_CFG_MUX_SHIFT | pga << ADS1015_CFG_PGA_SHIFT |
- dr << ADS1015_CFG_DR_SHIFT;
+ cfg = FIELD_PREP(ADS1015_CFG_MUX_MASK, chan) |
+ FIELD_PREP(ADS1015_CFG_PGA_MASK, pga) |
+ FIELD_PREP(ADS1015_CFG_DR_MASK, dr);
if (ads1015_event_channel_enabled(data)) {
mask |= ADS1015_CFG_COMP_QUE_MASK | ADS1015_CFG_COMP_MODE_MASK;
- cfg |= data->thresh_data[chan].comp_queue <<
- ADS1015_CFG_COMP_QUE_SHIFT |
- data->comp_mode <<
- ADS1015_CFG_COMP_MODE_SHIFT;
+ cfg |= FIELD_PREP(ADS1015_CFG_COMP_QUE_MASK,
+ data->thresh_data[chan].comp_queue) |
+ FIELD_PREP(ADS1015_CFG_COMP_MODE_MASK,
+ data->comp_mode);
}
cfg = (old & ~mask) | (cfg & mask);
@@ -427,7 +420,7 @@ int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
data->conv_invalid = true;
}
if (data->conv_invalid) {
- dr_old = (old & ADS1015_CFG_DR_MASK) >> ADS1015_CFG_DR_SHIFT;
+ dr_old = FIELD_GET(ADS1015_CFG_DR_MASK, old);
conv_time = DIV_ROUND_UP(USEC_PER_SEC, data_rate[dr_old]);
conv_time += DIV_ROUND_UP(USEC_PER_SEC, data_rate[dr]);
conv_time += conv_time / 10; /* 10% internal clock inaccuracy */
@@ -745,6 +738,7 @@ static int ads1015_disable_event_config(struct ads1015_data *data,
const struct iio_chan_spec *chan, int comp_mode)
{
struct regmap *map = data->regmap;
+ unsigned int val;
int ret;
if (!ads1015_event_channel_enabled(data))
@@ -757,10 +751,8 @@ static int ads1015_disable_event_config(struct ads1015_data *data,
comp_mode == ADS1015_CFG_COMP_MODE_WINDOW)
return 0;
- ret = regmap_update_bits(map, ADS1015_CFG_REG,
- ADS1015_CFG_COMP_QUE_MASK,
- ADS1015_CFG_COMP_DISABLE <<
- ADS1015_CFG_COMP_QUE_SHIFT);
+ val = FIELD_PREP(ADS1015_CFG_COMP_QUE_MASK, ADS1015_CFG_COMP_DISABLE);
+ ret = regmap_update_bits(map, ADS1015_CFG_REG, ADS1015_CFG_COMP_QUE_MASK, val);
if (ret)
return ret;
@@ -926,11 +918,11 @@ static void ads1015_power_down(void *p)
{
struct ads1015_data *data = p;
struct regmap *map = data->regmap;
+ unsigned int val;
int ret;
- ret = regmap_update_bits(map, ADS1015_CFG_REG,
- ADS1015_CFG_MOD_MASK,
- ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
+ val = FIELD_PREP(ADS1015_CFG_MOD_MASK, ADS1015_SINGLESHOT);
+ ret = regmap_update_bits(map, ADS1015_CFG_REG, ADS1015_CFG_MOD_MASK, val);
if (ret)
dev_warn(regmap_get_device(data->regmap),
@@ -943,6 +935,7 @@ static int ads1015_probe(struct i2c_client *client)
struct device *dev = &client->dev;
struct iio_dev *indio_dev;
struct ads1015_data *data;
+ unsigned int cfg_mode;
int ret;
int i;
@@ -1003,19 +996,19 @@ static int ads1015_probe(struct i2c_client *client)
unsigned int cfg_comp_mask = ADS1015_CFG_COMP_QUE_MASK |
ADS1015_CFG_COMP_LAT_MASK | ADS1015_CFG_COMP_POL_MASK;
unsigned int cfg_comp =
- ADS1015_CFG_COMP_DISABLE << ADS1015_CFG_COMP_QUE_SHIFT |
- 1 << ADS1015_CFG_COMP_LAT_SHIFT;
+ FIELD_PREP(ADS1015_CFG_COMP_QUE_MASK, ADS1015_CFG_COMP_DISABLE) |
+ FIELD_PREP(ADS1015_CFG_COMP_LAT_MASK, 1);
switch (irq_trig) {
case IRQF_TRIGGER_FALLING:
case IRQF_TRIGGER_LOW:
- cfg_comp |= ADS1015_CFG_COMP_POL_LOW <<
- ADS1015_CFG_COMP_POL_SHIFT;
+ cfg_comp |= FIELD_PREP(ADS1015_CFG_COMP_POL_MASK,
+ ADS1015_CFG_COMP_POL_LOW);
break;
case IRQF_TRIGGER_HIGH:
case IRQF_TRIGGER_RISING:
- cfg_comp |= ADS1015_CFG_COMP_POL_HIGH <<
- ADS1015_CFG_COMP_POL_SHIFT;
+ cfg_comp |= FIELD_PREP(ADS1015_CFG_COMP_POL_MASK,
+ ADS1015_CFG_COMP_POL_HIGH);
break;
default:
return -EINVAL;
@@ -1034,9 +1027,8 @@ static int ads1015_probe(struct i2c_client *client)
return ret;
}
- ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
- ADS1015_CFG_MOD_MASK,
- ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
+ cfg_mode = FIELD_PREP(ADS1015_CFG_MOD_MASK, ADS1015_CONTINUOUS);
+ ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG, ADS1015_CFG_MOD_MASK, cfg_mode);
if (ret)
return ret;
@@ -1060,10 +1052,10 @@ static int ads1015_runtime_suspend(struct device *dev)
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct ads1015_data *data = iio_priv(indio_dev);
struct regmap *map = data->regmap;
+ unsigned int val;
- return regmap_update_bits(map, ADS1015_CFG_REG,
- ADS1015_CFG_MOD_MASK,
- ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
+ val = FIELD_PREP(ADS1015_CFG_MOD_MASK, ADS1015_SINGLESHOT);
+ return regmap_update_bits(map, ADS1015_CFG_REG, ADS1015_CFG_MOD_MASK, val);
}
static int ads1015_runtime_resume(struct device *dev)
@@ -1071,11 +1063,11 @@ static int ads1015_runtime_resume(struct device *dev)
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
struct ads1015_data *data = iio_priv(indio_dev);
struct regmap *map = data->regmap;
+ unsigned int val;
int ret;
- ret = regmap_update_bits(map, ADS1015_CFG_REG,
- ADS1015_CFG_MOD_MASK,
- ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
+ val = FIELD_PREP(ADS1015_CFG_MOD_MASK, ADS1015_CONTINUOUS);
+ ret = regmap_update_bits(map, ADS1015_CFG_REG, ADS1015_CFG_MOD_MASK, val);
if (!ret)
data->conv_invalid = true;
--
2.39.5
next prev parent reply other threads:[~2026-09-30 17:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 17:11 [PATCH v5 00/10] iio: adc: ti-ads1015: modernize resource management and bitfield logic Archit Anant
2026-09-30 17:11 ` [PATCH v5 01/10] iio: adc: ti-ads1015: use DEFINE_RUNTIME_DEV_PM_OPS() Archit Anant
2026-09-30 17:11 ` [PATCH v5 02/10] iio: adc: ti-ads1015: sort headers alphabetically Archit Anant
2026-10-01 7:08 ` Joshua Crofts
2026-09-30 17:11 ` [PATCH v5 03/10] iio: adc: ti-ads1015: return -ENODATA when match data is missing Archit Anant
2026-09-30 17:11 ` [PATCH v5 04/10] iio: adc: ti-ads1015: use local device pointer in probe Archit Anant
2026-09-30 17:11 ` [PATCH v5 05/10] iio: adc: ti-ads1015: use dev_err_probe() for error handling Archit Anant
2026-10-01 7:10 ` Joshua Crofts
2026-09-30 17:12 ` [PATCH v5 06/10] iio: adc: ti-ads1015: drop unneeded < 0 error checks Archit Anant
2026-09-30 17:12 ` [PATCH v5 07/10] iio: adc: ti-ads1015: use devm_mutex_init() Archit Anant
2026-09-30 17:12 ` [PATCH v5 08/10] iio: adc: ti-ads1015: use managed runtime PM setup Archit Anant
2026-09-30 17:12 ` [PATCH v5 09/10] iio: adc: ti-ads1015: inline ads1015_set_conv_mode() Archit Anant
2026-09-30 17:12 ` Archit Anant [this message]
2026-10-01 7:12 ` [PATCH v5 00/10] iio: adc: ti-ads1015: modernize resource management and bitfield logic Joshua Crofts
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