Re: [PATCH msm-next] drm/msm/a8xx: report the GMEM size of the active slices

[Rahul Pon <theflyingrahul@gmail.com>]

On 9/30/2026 6:48 PM, Akhil P Oommen wrote:
> This commit text is incorrect, but the fix is valid. Please use this series
> for Mahua GPU support:
>
> https://lore.kernel.org/lkml/20260925-mahua-gpu-v1-0-0fa0bfd8d315@oss.qualcomm.com/

Thanks for the review, and sorry for the confusion. I hadn't seen your
series. With Glymur's X2-90 entry the driver reported 3 of 4 slices
active, and I took that for a part with a slice fused off.

To be sure I have it right this time: the X2-85 in Mahua is a 3-slice
GPU by design, with its own GMEM size (15.75 MB in your series), and
not an X2-90 with one slice fused off. Is that correct?

I've tested your series (patches 3 and 5) on this laptop (HP OmniBook
5 16, X2E-84-100): the GPU now comes up as chip ID 0x44060030 (speed-bin
fuse 357) with 15.75 MB of GMEM and the GMU firmware loaded, and with
Mesa main, which has the 0x44060030 entry, GNOME Shell and glmark2 render
on the GPU without corruption. I'll reply with my Tested-by on that
thread.

> Please add '()' to improve readability. And it would be easier on eyes, if you
> don't break the line.
>
> Also, reword the commit text to exclude mentioning Mahua. We don't a partial slice SKU
> commercialized yet.

Done in v2, which I'm sending now.

Thanks,
Rahul