[PATCH 0/2] clk: qcom: gcc-ipq5018: stop UBI0 clocks from reclocking their parents

[PATCH 0/2] clk: qcom: gcc-ipq5018: stop UBI0 clocks from reclocking their parents

[Andrei-Alexandru Bleortu]

ubi0_axi_clk_src and three UBI0 bus branches (gcc_ubi0_cfg_clk,
gcc_ubi0_utcm_clk, gcc_ubi0_nc_axi_clk) carry CLK_SET_RATE_PARENT, so a
rate request on them is propagated to GPLL0 or to the NoC clock sources
that the rest of the SoC runs from. The first patch is the one seen
failing: a 400 MHz request on ubi0_axi_clk_src made GPLL0 the top of the
rate change, re-ran set_rate on every GPLL0 consumer and hung the eMMC
controller. The second applies the same reasoning to the bus branches.

Nothing in mainline sets these rates today; the requests came from the
out-of-tree NSS driver on a Ubiquiti UniFi U6 Enterprise (IPQ5018).

Both were found and written with an AI coding assistant (Claude Code),
which also drafted the changelogs. The eMMC hang was seen while
bringing the board up on 6.12 with the NSS driver; the board boots and
runs with both on 6.12 and 7.2.8. On linux-next they are compile-tested
(W=1) only.

Andrei-Alexandru Bleortu (2):
  clk: qcom: gcc-ipq5018: drop CLK_SET_RATE_PARENT from ubi0_axi_clk_src
  clk: qcom: gcc-ipq5018: drop CLK_SET_RATE_PARENT from UBI0 NoC
    branches

 drivers/clk/qcom/gcc-ipq5018.c | 4 ----
 1 file changed, 4 deletions(-)

-- 
2.47.3

[PATCH 1/2] clk: qcom: gcc-ipq5018: drop CLK_SET_RATE_PARENT from ubi0_axi_clk_src

[Andrei-Alexandru Bleortu]

ubi0_axi_clk_src has CLK_SET_RATE_PARENT, but its parents are XO and
the read-only GPLL0 and GPLL2 post-dividers, so propagating a rate
request can never change their rate.

It does make the clock core treat any rounding gap as a GPLL0 rate
change. Requesting 400 MHz (GPLL0 / 2) while GPLL0 reads back as
799999998 Hz makes GPLL0 the top of the change, and clk_change_rate()
then re-runs set_rate on every GPLL0 consumer. That includes the live
NoC clocks and sdcc1_apps_clk_src, which is gated at that moment and
fails with "rcg didn't update its configuration", leaving the eMMC
controller and the board hung.

Drop the flag so that a rate request on ubi0_axi_clk_src stays local to
it. gcc_ubi0_axi_clk keeps its flag and still forwards requests to this
clock.

Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018")

Assisted-by: LLM
Signed-off-by: Andrei-Alexandru Bleortu <me@andrei-z.com>
---
 drivers/clk/qcom/gcc-ipq5018.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c
index add6a53d4df5..620b9ed72138 100644
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -1197,7 +1197,6 @@ static struct clk_rcg2 ubi0_axi_clk_src = {
 		.parent_data = gcc_xo_gpll0_gpll2,
 		.num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll2),
 		.ops = &clk_rcg2_ops,
-		.flags = CLK_SET_RATE_PARENT,
 	},
 };
 
-- 
2.47.3

[PATCH 2/2] clk: qcom: gcc-ipq5018: drop CLK_SET_RATE_PARENT from UBI0 NoC branches

[Andrei-Alexandru Bleortu]

gcc_ubi0_cfg_clk is a child of pcnoc_clk_src, and gcc_ubi0_utcm_clk and
gcc_ubi0_nc_axi_clk are children of system_noc_clk_src. All three have
CLK_SET_RATE_PARENT, so a rate request on one of these leaf gates
reprograms the live NoC clock sources that every other peripheral on
the bus runs from.

Each NoC has a single rate anyway, so drop the flag and let these gates
follow the bus instead of setting it.

Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018")

Assisted-by: LLM
Signed-off-by: Andrei-Alexandru Bleortu <me@andrei-z.com>
---
 drivers/clk/qcom/gcc-ipq5018.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c
index 620b9ed72138..37ccdc44a8d4 100644
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -2853,7 +2853,6 @@ static struct clk_branch gcc_ubi0_cfg_clk = {
 				&pcnoc_clk_src.hw,
 			},
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2907,7 +2906,6 @@ static struct clk_branch gcc_ubi0_nc_axi_clk = {
 				&system_noc_clk_src.hw,
 			},
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2925,7 +2923,6 @@ static struct clk_branch gcc_ubi0_utcm_clk = {
 				&system_noc_clk_src.hw,
 			},
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
 			.ops = &clk_branch2_ops,
 		},
 	},
-- 
2.47.3