From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Vishal Badole <Vishal.Badole@amd.com>,
tony.luck@intel.com, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] EDAC/amd64: Set zn_regs_v2 for all Family 1Ah models
Date: Sun, 4 Oct 2026 11:14:47 -0400 [thread overview]
Message-ID: <20261004151447.GA2673@yaz-khff2.amd.com> (raw)
In-Reply-To: <20261003012238.GCasBY3rN9K8ps1dDR@fat_crate.local>
On Fri, Oct 02, 2026 at 06:22:38PM -0700, Borislav Petkov wrote:
> On Fri, Oct 02, 2026 at 05:02:04PM +0530, Vishal Badole wrote:
> > All Family 1Ah models use the v2 register layout. Today zn_regs_v2 is
> > set in each model case. This works, but a new model could forget to set
> > it and read the UMC registers at the wrong offsets.
> >
> > Set zn_regs_v2 once at the Family 1Ah level so it applies to all models
> > uniformly, and drop the per-model assignments.
> >
> > No functional change intended.
> >
> > Suggested-by: Yazen Ghannam <yazen.ghannam@amd.com>
> > Signed-off-by: Vishal Badole <Vishal.Badole@amd.com>
> > Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
> > ---
> > drivers/edac/amd64_edac.c | 8 ++------
> > 1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> > index 0c0d11c72925..708fc1b4a999 100644
> > --- a/drivers/edac/amd64_edac.c
> > +++ b/drivers/edac/amd64_edac.c
> > @@ -3887,23 +3887,19 @@ static int per_family_init(struct amd64_pvt *pvt)
> > break;
> >
> > case 0x1A:
> > + pvt->flags.zn_regs_v2 = 1;
> > +
> > switch (pvt->model) {
> > case 0x00 ... 0x1f:
> > pvt->max_mcs = 12;
> > - pvt->flags.zn_regs_v2 = 1;
> > - break;
> > - case 0x40 ... 0x4f:
> ^^^^^^^^^^^^^^^^^^^
>
> Why?
>
> > - pvt->flags.zn_regs_v2 = 1;
> > break;
Because it becomes an empty case once this flag set is moved up.
Thanks,
Yazen
next prev parent reply other threads:[~2026-10-04 15:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 11:32 [PATCH v3 0/2] EDAC/amd64: Fix UMC csrow decode and consolidate Family 1Ah setup Vishal Badole
2026-10-02 11:32 ` [PATCH v3 1/2] EDAC/amd64: Mask UMC chip select to the four implemented selects Vishal Badole
2026-10-02 11:32 ` [PATCH v3 2/2] EDAC/amd64: Set zn_regs_v2 for all Family 1Ah models Vishal Badole
2026-10-03 1:22 ` Borislav Petkov
2026-10-04 15:14 ` Yazen Ghannam [this message]
2026-10-04 16:04 ` Borislav Petkov
2026-10-04 17:05 ` Yazen Ghannam
2026-10-04 17:50 ` Borislav Petkov
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