* [RFC PATCH v2 0/2] ASoC: tegra: ASRC ratio control updates
@ 2026-10-05 8:52 Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 1/2] ASoC: tegra: Update ASRC ratio controls Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 2/2] ASoC: tegra: Cache ASRC ratios until streams are active Sheetal
0 siblings, 2 replies; 3+ messages in thread
From: Sheetal @ 2026-10-05 8:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Jaroslav Kysela, Takashi Iwai, Thierry Reding, Jonathan Hunter,
Sameer Pujar, Kuninori Morimoto, Mohan Kumar, linux-sound,
linux-tegra, linux-kernel, Sheetal
This RFC updates the Tegra ASRC software ratio controls so userspace
programs the integer and fractional ratio parts through one paired ALSA
mixer control.
This is a userspace-visible ALSA mixer control ABI change. Existing
userspace that programs the ratio with separate controls must switch from
the legacy commands:
amixer -c APE cset name="ASRC1 Ratio<N> Integer Part" \
<integer part>
amixer -c APE cset name="ASRC1 Ratio<N> Fractional Part" \
<fractional part>
to the paired control:
amixer -c APE cset name="ASRC1 Ratio<N>" \
"<integer part>,<fractional part>"
For example:
amixer -c APE cset name="ASRC1 Ratio1" "0,715827882"
The ABI change is needed because the previous separate controls can expose
hardware to a transient mixed ratio when one part has been updated but the
other still contains the old value. The paired control lets the driver
validate and program the full ratio together.
For active streams, the driver only unlocks and re-locks the stream when
the new software ratio differs from the cached ratio by more than 20%.
Hardware allows direct updates for smaller ratio changes, while larger
jumps require the stream lock to be refreshed.
Changes in v2:
- Split the Stream6 input threshold fix out as a separate non-RFC patch,
since that fix is independent of this ABI discussion.
- Expanded the ABI-change description with legacy userspace commands and
the new paired control command.
- Clarified why the driver keeps conditional unlock/relock handling for
active stream ratio updates.
Sheetal (2):
ASoC: tegra: Update ASRC ratio controls
ASoC: tegra: Cache ASRC ratios until streams are active
sound/soc/tegra/tegra186_asrc.c | 511 +++++++++++++++++++++-----------
sound/soc/tegra/tegra186_asrc.h | 5 +
2 files changed, 346 insertions(+), 170 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [RFC PATCH v2 1/2] ASoC: tegra: Update ASRC ratio controls
2026-10-05 8:52 [RFC PATCH v2 0/2] ASoC: tegra: ASRC ratio control updates Sheetal
@ 2026-10-05 8:52 ` Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 2/2] ASoC: tegra: Cache ASRC ratios until streams are active Sheetal
1 sibling, 0 replies; 3+ messages in thread
From: Sheetal @ 2026-10-05 8:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Jaroslav Kysela, Takashi Iwai, Thierry Reding, Jonathan Hunter,
Sameer Pujar, Kuninori Morimoto, Mohan Kumar, linux-sound,
linux-tegra, linux-kernel, Sheetal
Replace the separate integer and fractional ASRC ratio controls with a
single two-value control for each stream.
This is a userspace-visible ALSA mixer control ABI change. Existing
userspace that programs the ratio with separate controls must switch from
the legacy commands:
amixer -c APE cset name="ASRC1 Ratio<N> Integer Part" \
<integer part>
amixer -c APE cset name="ASRC1 Ratio<N> Fractional Part" \
<fractional part>
to the paired control:
amixer -c APE cset name="ASRC1 Ratio<N>" \
"<integer part>,<fractional part>"
For example, userspace should set "ASRC1 Ratio1" to "0,715827882"
instead of programming separate integer and fractional controls.
The ABI change is needed because the old controls update the integer and
fractional parts independently. That can expose hardware to a transient
mixed ratio when one part has been updated but the other still contains
the previous value. A paired control lets userspace send the complete
ratio in one ALSA control update, so the driver can validate and program
both fields together.
Keeping writable compatibility controls would preserve the non-atomic
update path, so the old controls are replaced instead of aliased.
Validate both values before programming hardware. The fractional field
keeps the existing 32-bit maximum, while the integer field is rejected
when it exceeds the hardware field width. ALSA exposes one min and max
range for all values in an integer-array control, so the paired ratio
controls advertise the fractional field's full 32-bit range and validate
the integer part in the put callback.
Serialize ratio-source changes, stream setup, and ratio updates with a
driver mutex so cached ratio state and paired hardware programming remain
consistent.
For active streams, unlock and re-lock the ASRC stream before programming
a software ratio only when the new ratio differs from the cached ratio by
more than 20%. Hardware allows direct updates for smaller ratio changes,
while larger jumps require the stream lock to be refreshed around the
paired integer/fractional update.
Roll back the previous hardware pair and lock state if a paired ratio
update fails after partially programming the hardware.
Signed-off-by: Sheetal <sheetal@nvidia.com>
---
sound/soc/tegra/tegra186_asrc.c | 443 ++++++++++++++++++++------------
sound/soc/tegra/tegra186_asrc.h | 4 +
2 files changed, 276 insertions(+), 171 deletions(-)
diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asrc.c
index d8ae5d997615..2b67d23f5fa7 100644
--- a/sound/soc/tegra/tegra186_asrc.c
+++ b/sound/soc/tegra/tegra186_asrc.c
@@ -19,6 +19,9 @@
#include "tegra186_asrc.h"
#include "tegra_cif.h"
+#define TEGRA186_ASRC_RATIO_PERCENT_SCALE 100
+#define TEGRA186_ASRC_RATIO_UNLOCK_THRESHOLD_PERCENT 20
+
#define ASRC_STREAM_SOURCE_SELECT(id) \
(TEGRA186_ASRC_CFG + ((id) * TEGRA186_ASRC_STREAM_STRIDE))
@@ -65,13 +68,125 @@ static const struct reg_default tegra186_asrc_reg_defaults[] = {
{ TEGRA186_ASRC_CYA, 0x0},
};
-static void tegra186_asrc_lock_stream(struct tegra186_asrc *asrc,
- unsigned int id)
+static int tegra186_asrc_set_stream_lock(struct tegra186_asrc *asrc,
+ unsigned int id, bool lock)
{
- regmap_write(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_LOCK_STATUS,
- id),
- 1);
+ return regmap_write(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_LOCK_STATUS,
+ id),
+ lock);
+}
+
+static int tegra186_asrc_write_ratio_pair(struct tegra186_asrc *asrc,
+ unsigned int id,
+ unsigned int int_part,
+ unsigned int frac_part)
+{
+ int ret;
+
+ ret = regmap_write(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
+ int_part);
+ if (ret)
+ return ret;
+
+ return regmap_write(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
+ frac_part);
+}
+
+static int tegra186_asrc_read_ratio_pair(struct tegra186_asrc *asrc,
+ unsigned int id, unsigned int *int_part,
+ unsigned int *frac_part)
+{
+ int ret;
+
+ ret = regmap_read(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
+ int_part);
+ if (ret)
+ return ret;
+
+ return regmap_read(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
+ frac_part);
+}
+
+static void tegra186_asrc_cache_ratio(struct tegra186_asrc *asrc,
+ unsigned int id, unsigned int int_part,
+ unsigned int frac_part)
+{
+ asrc->lane[id].int_part = int_part;
+ asrc->lane[id].frac_part = frac_part;
+}
+
+static int tegra186_asrc_apply_ratio(struct tegra186_asrc *asrc,
+ unsigned int id, unsigned int int_part,
+ unsigned int frac_part, bool unlock)
+{
+ unsigned int old_int_part, old_frac_part, old_lock;
+ int ret, restore_ret;
+
+ ret = tegra186_asrc_read_ratio_pair(asrc, id, &old_int_part,
+ &old_frac_part);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(asrc->regmap,
+ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_LOCK_STATUS, id),
+ &old_lock);
+ if (ret)
+ return ret;
+
+ if (unlock) {
+ ret = tegra186_asrc_set_stream_lock(asrc, id, false);
+ if (ret)
+ return ret;
+ }
+
+ ret = tegra186_asrc_write_ratio_pair(asrc, id, int_part, frac_part);
+ if (ret)
+ goto restore_ratio;
+
+ ret = tegra186_asrc_set_stream_lock(asrc, id, true);
+ if (!ret)
+ return 0;
+
+restore_ratio:
+ restore_ret = tegra186_asrc_write_ratio_pair(asrc, id,
+ old_int_part,
+ old_frac_part);
+ if (!restore_ret) {
+ if (old_lock)
+ restore_ret = tegra186_asrc_set_stream_lock(asrc, id,
+ true);
+ else
+ restore_ret = tegra186_asrc_set_stream_lock(asrc, id,
+ false);
+ }
+
+ return ret ?: restore_ret;
+}
+
+static int tegra186_asrc_apply_cached_ratio(struct tegra186_asrc *asrc,
+ unsigned int id)
+{
+ return tegra186_asrc_apply_ratio(asrc, id, asrc->lane[id].int_part,
+ asrc->lane[id].frac_part, false);
+}
+
+static bool tegra186_asrc_need_unlock(u64 old_ratio, u64 new_ratio)
+{
+ u64 ratio_diff;
+
+ if (!old_ratio || !new_ratio)
+ return false;
+
+ ratio_diff = (old_ratio > new_ratio) ?
+ (old_ratio - new_ratio) : (new_ratio - old_ratio);
+
+ return ((ratio_diff * TEGRA186_ASRC_RATIO_PERCENT_SCALE) >
+ (old_ratio * TEGRA186_ASRC_RATIO_UNLOCK_THRESHOLD_PERCENT));
}
static int tegra186_asrc_runtime_suspend(struct device *dev)
@@ -87,7 +202,7 @@ static int tegra186_asrc_runtime_suspend(struct device *dev)
static int tegra186_asrc_runtime_resume(struct device *dev)
{
struct tegra186_asrc *asrc = dev_get_drvdata(dev);
- int id;
+ int id, ret, first_err = 0;
regcache_cache_only(asrc->regmap, false);
@@ -103,25 +218,23 @@ static int tegra186_asrc_runtime_resume(struct device *dev)
regcache_sync(asrc->regmap);
+ mutex_lock(&asrc->ratio_lock);
for (id = 0; id < TEGRA186_ASRC_STREAM_MAX; id++) {
if (asrc->lane[id].ratio_source !=
TEGRA186_ASRC_RATIO_SOURCE_SW)
continue;
- regmap_write(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART,
- id),
- asrc->lane[id].int_part);
-
- regmap_write(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART,
- id),
- asrc->lane[id].frac_part);
-
- tegra186_asrc_lock_stream(asrc, id);
+ ret = tegra186_asrc_apply_cached_ratio(asrc, id);
+ if (ret) {
+ dev_err(dev, "Failed to restore ratio for lane %d: %d\n",
+ id, ret);
+ if (!first_err)
+ first_err = ret;
+ }
}
+ mutex_unlock(&asrc->ratio_lock);
- return 0;
+ return first_err;
}
static int tegra186_asrc_set_audio_cif(struct tegra186_asrc *asrc,
@@ -186,7 +299,7 @@ static int tegra186_asrc_out_hw_params(struct snd_pcm_substream *substream,
{
struct device *dev = dai->dev;
struct tegra186_asrc *asrc = snd_soc_dai_get_drvdata(dai);
- int ret, id = dai->id - 7;
+ int ret = 0, id = dai->id - 7;
/* Set output threshold */
regmap_write(asrc->regmap,
@@ -217,20 +330,22 @@ static int tegra186_asrc_out_hw_params(struct snd_pcm_substream *substream,
TEGRA186_ASRC_STREAM_DEFAULT_HW_COMP_BIAS_VALUE);
}
+ mutex_lock(&asrc->ratio_lock);
+
/* Set lock */
regmap_update_bits(asrc->regmap,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id),
1, asrc->lane[id].ratio_source);
if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_SW) {
- regmap_write(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
- asrc->lane[id].int_part);
- regmap_write(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
- asrc->lane[id].frac_part);
- tegra186_asrc_lock_stream(asrc, id);
+ ret = tegra186_asrc_apply_cached_ratio(asrc, id);
+ if (ret)
+ dev_err(dev, "Can't apply cached ratio for ASRC stream %d: %d\n",
+ id, ret);
}
+ mutex_unlock(&asrc->ratio_lock);
+ if (ret)
+ return ret;
return ret;
}
@@ -257,112 +372,132 @@ static int tegra186_asrc_put_ratio_source(struct snd_kcontrol *kcontrol,
struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt);
unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE;
+ unsigned int new_source = ucontrol->value.enumerated.item[0];
+ unsigned int old_source, int_part = 0, frac_part = 0;
bool change = false;
+ int ret;
- asrc->lane[id].ratio_source = ucontrol->value.enumerated.item[0];
+ mutex_lock(&asrc->ratio_lock);
- regmap_update_bits_check(asrc->regmap, asrc_private->reg,
- TEGRA186_ASRC_STREAM_RATIO_TYPE_MASK,
- asrc->lane[id].ratio_source,
- &change);
+ old_source = asrc->lane[id].ratio_source;
- return change ? 1 : 0;
-}
+ if (old_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD &&
+ new_source == TEGRA186_ASRC_RATIO_SOURCE_SW) {
+ ret = tegra186_asrc_read_ratio_pair(asrc, id, &int_part,
+ &frac_part);
+ if (ret) {
+ mutex_unlock(&asrc->ratio_lock);
+ return ret;
+ }
+ }
-static int tegra186_asrc_get_ratio_int(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct soc_mixer_control *asrc_private =
- (struct soc_mixer_control *)kcontrol->private_value;
- struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
- struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt);
- unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE;
+ ret = regmap_update_bits_check(asrc->regmap, asrc_private->reg,
+ TEGRA186_ASRC_STREAM_RATIO_TYPE_MASK,
+ new_source, &change);
+ if (ret) {
+ mutex_unlock(&asrc->ratio_lock);
+ return ret;
+ }
- regmap_read(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
- &asrc->lane[id].int_part);
+ asrc->lane[id].ratio_source = new_source;
+ if (old_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD &&
+ new_source == TEGRA186_ASRC_RATIO_SOURCE_SW)
+ tegra186_asrc_cache_ratio(asrc, id, int_part, frac_part);
- ucontrol->value.integer.value[0] = asrc->lane[id].int_part;
+ mutex_unlock(&asrc->ratio_lock);
- return 0;
+ return change ? 1 : 0;
}
-static int tegra186_asrc_put_ratio_int(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+static int tegra186_asrc_get_ratio(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- struct soc_mixer_control *asrc_private =
- (struct soc_mixer_control *)kcontrol->private_value;
+ struct soc_mreg_control *asrc_private =
+ (struct soc_mreg_control *)kcontrol->private_value;
struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt);
- unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE;
- bool change = false;
+ unsigned int id = asrc_private->regbase;
+ unsigned int int_part, frac_part;
+ int ret;
+
+ mutex_lock(&asrc->ratio_lock);
if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) {
- dev_err(cmpnt->dev,
- "Lane %d ratio source is ARAD, invalid SW update\n",
- id);
- return -EINVAL;
+ ret = tegra186_asrc_read_ratio_pair(asrc, id, &int_part,
+ &frac_part);
+ } else {
+ int_part = asrc->lane[id].int_part;
+ frac_part = asrc->lane[id].frac_part;
+ ret = 0;
}
- asrc->lane[id].int_part = ucontrol->value.integer.value[0];
-
- regmap_update_bits_check(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART,
- id),
- TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK,
- asrc->lane[id].int_part, &change);
+ mutex_unlock(&asrc->ratio_lock);
+ if (ret)
+ return ret;
- tegra186_asrc_lock_stream(asrc, id);
+ ucontrol->value.integer.value[0] = int_part;
+ ucontrol->value.integer.value[1] = frac_part;
- return change ? 1 : 0;
+ return 0;
}
-static int tegra186_asrc_get_ratio_frac(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+static int tegra186_asrc_put_ratio(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
struct soc_mreg_control *asrc_private =
(struct soc_mreg_control *)kcontrol->private_value;
struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt);
- unsigned int id = asrc_private->regbase / TEGRA186_ASRC_STREAM_STRIDE;
-
- regmap_read(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
- &asrc->lane[id].frac_part);
+ unsigned int id = asrc_private->regbase;
+ unsigned int int_part, frac_part;
+ u64 old_ratio, new_ratio;
+ long int_val = ucontrol->value.integer.value[0];
+ long frac_val = ucontrol->value.integer.value[1];
+ bool change = false, unlock = false;
+ int ret = 0;
+
+ if (int_val < 0 || int_val > TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK)
+ return -EINVAL;
- ucontrol->value.integer.value[0] = asrc->lane[id].frac_part;
+ if (frac_val < 0 || frac_val > TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK)
+ return -EINVAL;
- return 0;
-}
+ int_part = int_val;
+ frac_part = frac_val;
-static int tegra186_asrc_put_ratio_frac(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct soc_mreg_control *asrc_private =
- (struct soc_mreg_control *)kcontrol->private_value;
- struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
- struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt);
- unsigned int id = asrc_private->regbase / TEGRA186_ASRC_STREAM_STRIDE;
- bool change = false;
+ mutex_lock(&asrc->ratio_lock);
if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) {
dev_err(cmpnt->dev,
"Lane %d ratio source is ARAD, invalid SW update\n",
id);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out_unlock;
}
- asrc->lane[id].frac_part = ucontrol->value.integer.value[0];
+ old_ratio = ((u64)asrc->lane[id].int_part << 32) |
+ asrc->lane[id].frac_part;
+ new_ratio = ((u64)int_part << 32) | frac_part;
+
+ if (!new_ratio) {
+ ret = -EINVAL;
+ goto out_unlock;
+ }
- regmap_update_bits_check(asrc->regmap,
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART,
- id),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- asrc->lane[id].frac_part, &change);
+ change = old_ratio != new_ratio;
+ if (!change)
+ goto out_unlock;
- tegra186_asrc_lock_stream(asrc, id);
+ unlock = tegra186_asrc_need_unlock(old_ratio, new_ratio);
- return change ? 1 : 0;
+ ret = tegra186_asrc_apply_ratio(asrc, id, int_part, frac_part, unlock);
+ if (!ret)
+ tegra186_asrc_cache_ratio(asrc, id, int_part, frac_part);
+
+out_unlock:
+ mutex_unlock(&asrc->ratio_lock);
+
+ return ret ?: change;
}
static int tegra186_asrc_get_hwcomp_disable(struct snd_kcontrol *kcontrol,
@@ -651,99 +786,63 @@ ASRC_SOURCE_DECL(src_select4, 3);
ASRC_SOURCE_DECL(src_select5, 4);
ASRC_SOURCE_DECL(src_select6, 5);
-#define SOC_SINGLE_EXT_FRAC(xname, xregbase, xmax, xget, xput) \
+static int tegra186_asrc_ratio_param_info(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ struct soc_mreg_control *mc =
+ (struct soc_mreg_control *)kcontrol->private_value;
+
+ /*
+ * ALSA exposes one range for all values in an integer array. The
+ * fractional part needs the full 32-bit range; the integer part is
+ * validated against the hardware field width in the put callback.
+ */
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = mc->min;
+ uinfo->value.integer.max = mc->max;
+
+ return 0;
+}
+
+#define SOC_SINGLE_EXT_ARRAY(xname, xregbase, xmax, xget, xput) \
{ \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.name = (xname), \
- .info = snd_soc_info_xr_sx, \
+ .info = tegra186_asrc_ratio_param_info, \
.get = xget, \
.put = xput, \
\
.private_value = (unsigned long)&(struct soc_mreg_control) \
{ \
.regbase = xregbase, \
- .regcount = 1, \
+ .regcount = 2, \
.nbits = 32, \
.invert = 0, \
.min = 0, \
- .max = xmax \
+ .max = (xmax) \
} \
}
static const struct snd_kcontrol_new tegra186_asrc_controls[] = {
- /* Controls for integer part of ratio */
- SOC_SINGLE_EXT("Ratio1 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 0),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- SOC_SINGLE_EXT("Ratio2 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 1),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- SOC_SINGLE_EXT("Ratio3 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 2),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- SOC_SINGLE_EXT("Ratio4 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 3),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- SOC_SINGLE_EXT("Ratio5 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 4),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- SOC_SINGLE_EXT("Ratio6 Integer Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 5),
- 0, TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK, 0,
- tegra186_asrc_get_ratio_int,
- tegra186_asrc_put_ratio_int),
-
- /* Controls for fractional part of ratio */
- SOC_SINGLE_EXT_FRAC("Ratio1 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 0),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
-
- SOC_SINGLE_EXT_FRAC("Ratio2 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 1),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
-
- SOC_SINGLE_EXT_FRAC("Ratio3 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 2),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
-
- SOC_SINGLE_EXT_FRAC("Ratio4 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 3),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
-
- SOC_SINGLE_EXT_FRAC("Ratio5 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 4),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
-
- SOC_SINGLE_EXT_FRAC("Ratio6 Fractional Part",
- ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 5),
- TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
- tegra186_asrc_get_ratio_frac,
- tegra186_asrc_put_ratio_frac),
+ /* Controls for ASRC */
+ SOC_SINGLE_EXT_ARRAY("Ratio1", 0, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
+
+ SOC_SINGLE_EXT_ARRAY("Ratio2", 1, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
+
+ SOC_SINGLE_EXT_ARRAY("Ratio3", 2, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
+
+ SOC_SINGLE_EXT_ARRAY("Ratio4", 3, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
+
+ SOC_SINGLE_EXT_ARRAY("Ratio5", 4, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
+
+ SOC_SINGLE_EXT_ARRAY("Ratio6", 5, TEGRA186_ASRC_STREAM_RATIO_FRAC_PART_MASK,
+ tegra186_asrc_get_ratio, tegra186_asrc_put_ratio),
/* Source of ratio provider */
SOC_ENUM_EXT("Ratio1 Source", src_select1,
@@ -1011,6 +1110,8 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
TEGRA186_ASRC_STREAM_DEFAULT_OUTPUT_HW_COMP_THRESH_CFG;
}
+ mutex_init(&asrc->ratio_lock);
+
err = devm_snd_soc_register_component(dev, &tegra186_asrc_cmpnt,
tegra186_asrc_dais,
ARRAY_SIZE(tegra186_asrc_dais));
diff --git a/sound/soc/tegra/tegra186_asrc.h b/sound/soc/tegra/tegra186_asrc.h
index 0c98e26d5e72..9cc8cec6c204 100644
--- a/sound/soc/tegra/tegra186_asrc.h
+++ b/sound/soc/tegra/tegra186_asrc.h
@@ -7,6 +7,8 @@
#ifndef __TEGRA186_ASRC_H__
#define __TEGRA186_ASRC_H__
+#include <linux/mutex.h>
+
/* ASRC stream related offset */
#define TEGRA186_ASRC_CFG 0x0
#define TEGRA186_ASRC_RATIO_INT_PART 0x4
@@ -111,6 +113,8 @@ struct tegra186_asrc {
const struct tegra_asrc_soc_data *soc_data;
struct tegra186_asrc_lane lane[TEGRA186_ASRC_STREAM_MAX];
struct regmap *regmap;
+ /* Serializes ratio source, cache, and paired register updates. */
+ struct mutex ratio_lock;
};
#endif
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [RFC PATCH v2 2/2] ASoC: tegra: Cache ASRC ratios until streams are active
2026-10-05 8:52 [RFC PATCH v2 0/2] ASoC: tegra: ASRC ratio control updates Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 1/2] ASoC: tegra: Update ASRC ratio controls Sheetal
@ 2026-10-05 8:52 ` Sheetal
1 sibling, 0 replies; 3+ messages in thread
From: Sheetal @ 2026-10-05 8:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Jaroslav Kysela, Takashi Iwai, Thierry Reding, Jonathan Hunter,
Sameer Pujar, Kuninori Morimoto, Mohan Kumar, linux-sound,
linux-tegra, linux-kernel, Sheetal
Cache software ratio control updates when the ASRC device is runtime
suspended or when the target stream is not active. Program the cached
ratio when the stream is configured, and restore it after runtime resume.
Take a runtime PM reference for ratio-source changes when the ASRC device
is runtime-active, even if the target stream is not active, so a
hardware-to-software source transition can safely capture the live ratio
pair and update the source-select register. If the ASRC device is
suspended, avoid waking it from a control update, update the cached
source state, and mark the cached ratio invalid so the
first software apply refreshes the ratio lock state.
This also avoids unsafe volatile-register access during suspended control
updates. For hardware-sourced ratios, return the cached pair when the
device is not runtime active instead of waking it only for a mixer read.
Return an error from runtime resume if restoring a cached ratio fails.
This lets the PM core see that resume did not fully restore the stream
state instead of leaving the hardware running with stale ratio registers.
Signed-off-by: Sheetal <sheetal@nvidia.com>
---
sound/soc/tegra/tegra186_asrc.c | 106 ++++++++++++++++++++++++++------
sound/soc/tegra/tegra186_asrc.h | 1 +
2 files changed, 89 insertions(+), 18 deletions(-)
diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asrc.c
index 2b67d23f5fa7..389bc1a294e1 100644
--- a/sound/soc/tegra/tegra186_asrc.c
+++ b/sound/soc/tegra/tegra186_asrc.c
@@ -118,6 +118,7 @@ static void tegra186_asrc_cache_ratio(struct tegra186_asrc *asrc,
{
asrc->lane[id].int_part = int_part;
asrc->lane[id].frac_part = frac_part;
+ asrc->lane[id].ratio_valid = true;
}
static int tegra186_asrc_apply_ratio(struct tegra186_asrc *asrc,
@@ -171,8 +172,15 @@ static int tegra186_asrc_apply_ratio(struct tegra186_asrc *asrc,
static int tegra186_asrc_apply_cached_ratio(struct tegra186_asrc *asrc,
unsigned int id)
{
- return tegra186_asrc_apply_ratio(asrc, id, asrc->lane[id].int_part,
- asrc->lane[id].frac_part, false);
+ int ret;
+
+ ret = tegra186_asrc_apply_ratio(asrc, id, asrc->lane[id].int_part,
+ asrc->lane[id].frac_part,
+ !asrc->lane[id].ratio_valid);
+ if (!ret)
+ asrc->lane[id].ratio_valid = true;
+
+ return ret;
}
static bool tegra186_asrc_need_unlock(u64 old_ratio, u64 new_ratio)
@@ -375,19 +383,32 @@ static int tegra186_asrc_put_ratio_source(struct snd_kcontrol *kcontrol,
unsigned int new_source = ucontrol->value.enumerated.item[0];
unsigned int old_source, int_part = 0, frac_part = 0;
bool change = false;
- int ret;
+ int pm_ret, ret;
mutex_lock(&asrc->ratio_lock);
old_source = asrc->lane[id].ratio_source;
+ pm_ret = pm_runtime_get_if_active(cmpnt->dev);
+ if (pm_ret < 0) {
+ mutex_unlock(&asrc->ratio_lock);
+ return pm_ret;
+ }
+
if (old_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD &&
new_source == TEGRA186_ASRC_RATIO_SOURCE_SW) {
- ret = tegra186_asrc_read_ratio_pair(asrc, id, &int_part,
- &frac_part);
- if (ret) {
- mutex_unlock(&asrc->ratio_lock);
- return ret;
+ if (pm_ret > 0) {
+ ret = tegra186_asrc_read_ratio_pair(asrc, id,
+ &int_part,
+ &frac_part);
+ if (ret) {
+ pm_runtime_put(cmpnt->dev);
+ asrc->lane[id].ratio_valid = false;
+ mutex_unlock(&asrc->ratio_lock);
+ return ret;
+ }
+ } else {
+ asrc->lane[id].ratio_valid = false;
}
}
@@ -395,15 +416,20 @@ static int tegra186_asrc_put_ratio_source(struct snd_kcontrol *kcontrol,
TEGRA186_ASRC_STREAM_RATIO_TYPE_MASK,
new_source, &change);
if (ret) {
+ if (pm_ret > 0)
+ pm_runtime_put(cmpnt->dev);
mutex_unlock(&asrc->ratio_lock);
return ret;
}
asrc->lane[id].ratio_source = new_source;
if (old_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD &&
- new_source == TEGRA186_ASRC_RATIO_SOURCE_SW)
+ new_source == TEGRA186_ASRC_RATIO_SOURCE_SW && pm_ret > 0)
tegra186_asrc_cache_ratio(asrc, id, int_part, frac_part);
+ if (pm_ret > 0)
+ pm_runtime_put(cmpnt->dev);
+
mutex_unlock(&asrc->ratio_lock);
return change ? 1 : 0;
@@ -422,18 +448,33 @@ static int tegra186_asrc_get_ratio(struct snd_kcontrol *kcontrol,
mutex_lock(&asrc->ratio_lock);
- if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) {
+ int_part = asrc->lane[id].int_part;
+ frac_part = asrc->lane[id].frac_part;
+
+ if (asrc->lane[id].ratio_source != TEGRA186_ASRC_RATIO_SOURCE_ARAD)
+ goto done;
+
+ ret = pm_runtime_get_if_active(cmpnt->dev);
+ if (ret < 0) {
+ mutex_unlock(&asrc->ratio_lock);
+ return ret;
+ }
+
+ if (ret > 0) {
ret = tegra186_asrc_read_ratio_pair(asrc, id, &int_part,
&frac_part);
- } else {
- int_part = asrc->lane[id].int_part;
- frac_part = asrc->lane[id].frac_part;
- ret = 0;
+ if (ret) {
+ pm_runtime_put(cmpnt->dev);
+ mutex_unlock(&asrc->ratio_lock);
+ return ret;
+ }
+ pm_runtime_put(cmpnt->dev);
+ asrc->lane[id].int_part = int_part;
+ asrc->lane[id].frac_part = frac_part;
}
+done:
mutex_unlock(&asrc->ratio_lock);
- if (ret)
- return ret;
ucontrol->value.integer.value[0] = int_part;
ucontrol->value.integer.value[1] = frac_part;
@@ -454,7 +495,7 @@ static int tegra186_asrc_put_ratio(struct snd_kcontrol *kcontrol,
long int_val = ucontrol->value.integer.value[0];
long frac_val = ucontrol->value.integer.value[1];
bool change = false, unlock = false;
- int ret = 0;
+ int ret = 0, pm_ret;
if (int_val < 0 || int_val > TEGRA186_ASRC_STREAM_RATIO_INT_PART_MASK)
return -EINVAL;
@@ -488,12 +529,40 @@ static int tegra186_asrc_put_ratio(struct snd_kcontrol *kcontrol,
if (!change)
goto out_unlock;
- unlock = tegra186_asrc_need_unlock(old_ratio, new_ratio);
+ unlock = !asrc->lane[id].ratio_valid ||
+ tegra186_asrc_need_unlock(old_ratio, new_ratio);
+
+ pm_ret = pm_runtime_get_if_active(cmpnt->dev);
+ if (pm_ret < 0) {
+ ret = pm_ret;
+ goto out_unlock;
+ }
+
+ if (!pm_ret) {
+ asrc->lane[id].int_part = int_part;
+ asrc->lane[id].frac_part = frac_part;
+ ret = 1;
+ goto out_unlock;
+ }
+
+ ret = regmap_read(asrc->regmap, ASRC_STREAM_REG(TEGRA186_ASRC_STATUS, id),
+ &pm_ret);
+ if (ret)
+ goto out_pm_put;
+
+ if (!(pm_ret & TEGRA186_ASRC_STREAM_EN)) {
+ asrc->lane[id].int_part = int_part;
+ asrc->lane[id].frac_part = frac_part;
+ ret = 1;
+ goto out_pm_put;
+ }
ret = tegra186_asrc_apply_ratio(asrc, id, int_part, frac_part, unlock);
if (!ret)
tegra186_asrc_cache_ratio(asrc, id, int_part, frac_part);
+out_pm_put:
+ pm_runtime_put(cmpnt->dev);
out_unlock:
mutex_unlock(&asrc->ratio_lock);
@@ -1103,6 +1172,7 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
asrc->lane[i].ratio_source = TEGRA186_ASRC_RATIO_SOURCE_SW;
asrc->lane[i].int_part = 1;
asrc->lane[i].frac_part = 0;
+ asrc->lane[i].ratio_valid = true;
asrc->lane[i].hwcomp_disable = 0;
asrc->lane[i].input_thresh =
TEGRA186_ASRC_STREAM_DEFAULT_INPUT_HW_COMP_THRESH_CFG;
diff --git a/sound/soc/tegra/tegra186_asrc.h b/sound/soc/tegra/tegra186_asrc.h
index 9cc8cec6c204..dabfd2e2c904 100644
--- a/sound/soc/tegra/tegra186_asrc.h
+++ b/sound/soc/tegra/tegra186_asrc.h
@@ -99,6 +99,7 @@
struct tegra186_asrc_lane {
unsigned int int_part;
unsigned int frac_part;
+ bool ratio_valid;
unsigned int ratio_source;
unsigned int hwcomp_disable;
unsigned int input_thresh;
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-10-05 8:55 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-10-05 8:52 [RFC PATCH v2 0/2] ASoC: tegra: ASRC ratio control updates Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 1/2] ASoC: tegra: Update ASRC ratio controls Sheetal
2026-10-05 8:52 ` [RFC PATCH v2 2/2] ASoC: tegra: Cache ASRC ratios until streams are active Sheetal
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