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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Steven Price <steven.price@arm.com>
Cc: "Adrián Larumbe" <adrian.larumbe@collabora.com>,
	"Rob Herring" <robh@kernel.org>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Faith Ekstrand" <faith.ekstrand@collabora.com>,
	"Marty E. Plummer" <hanetzer@startmail.com>,
	"Tomeu Vizoso" <tomeu@tomeuvizoso.net>,
	"Eric Anholt" <eric@anholt.net>,
	"Robin Murphy" <robin.murphy@arm.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	"Collabora Kernel Team" <kernel@collabora.com>,
	"Neil Armstrong" <neil.armstrong@linaro.org>
Subject: Re: [PATCH v12 12/15] drm/panfrost: Skip cache flush/invalidate when enabling perfcnt
Date: Mon, 5 Oct 2026 10:38:55 +0200	[thread overview]
Message-ID: <20261005103855.655f8199@fedora-61.home> (raw)
In-Reply-To: <95174a67-0eee-4bf7-b883-9f1138c74a6f@arm.com>

On Fri, 2 Oct 2026 16:14:38 +0100
Steven Price <steven.price@arm.com> wrote:

> On 29/09/2026 04:44, Adrián Larumbe wrote:
> > The GPU cache flush/invalidate operation is unnecessary. First off, the
> > GPU doesn't read off the perfcnt sample buffer, only writes into it, so  
> 
> I don't think this is entirely true. The GPU performance counter unit
> only writes the counters that are enabled, counters that share a cache
> line but are not enabled are not written by the performance counter
> unit, but if the L2 contains that cache line then the write can hit in
> the L2 and dirty the entire line including stale data where the
> unwritten cache line is.

I don't think this can happen though, because _enable_locked() is
creating a BO (and its GPU mapping) just before enabling the perfcnt
block, meaning the buffer is known to have no dirty cacheline pointing
to it until the first dump happens. And we do flush and invalidate GPU
caches after each dump, so again, we should be covered.

> 
> The upshot is that if the CPU has cleared a block of memory which the
> GPU happens to have cached, then the "unused" counters may end up
> showing the old data before the CPU cleared it (if they share a cache
> line with an active counter).

I agree, but that's not a case we can hit in the enable path. I think I
mentioned the commit message was misleading, and that we should instead
talk about the fact the GPU is not supposed to have cached anything up
until the first SAMPLE following a the ENABLE step.

> 
> I have to admit it's probably somewhat academic given that Panfrost
> doesn't expose the ability to control which counters are enabled...
> 
> Is there a good reason for this patch (i.e. have you seen a performance
> problem with doing the invalidate)? Otherwise I'd prefer we keep to the
> safe route rather than trying to over optimise cache maintenance.

I think I was the one suggesting dropping this flush so that
panfrost_perfcnt_hw_enable() (in the last patch) has one less fallible
operation. Besides, I find it confusing to have a cache flush+inval in
a path where the GPU is not supposed to have accessed the buffer yet
(or later on, when we re-enable after a RESET, in a path where the GPU
has been reset and the caches are known to be empty).

> 
> Obviously in the fully coherent case the invalidate could be skipped (as
> in the next patch).
> 
> Thanks,
> Steve
> 
> > an invalidate doesn't make a difference. Then flushing GPU caches after
> > each sample has been written is enough for the CPU to see updated values.
> > 
> > Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
> > Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
> > ---
> >  drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 15 ++-------------
> >  1 file changed, 2 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> > index f71534e741b6..ffc77121070e 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> > +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> > @@ -124,21 +124,10 @@ static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev,
> >  	panfrost_gem_internal_set_label(&bo->base, "Perfcnt sample buffer");
> >  
> >  	/*
> > -	 * Invalidate the cache and clear the counters to start from a fresh
> > -	 * state.
> > +	 * Clear the counters to start from a fresh state.
> >  	 */
> > -	reinit_completion(&pfdev->perfcnt->dump_comp);
> > -	gpu_write(pfdev, GPU_INT_CLEAR,
> > -		  GPU_IRQ_CLEAN_CACHES_COMPLETED |
> > -		  GPU_IRQ_PERFCNT_SAMPLE_COMPLETED);
> > +	gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_PERFCNT_SAMPLE_COMPLETED);
> >  	gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR);
> > -	gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES);
> > -	ret = wait_for_completion_timeout(&pfdev->perfcnt->dump_comp,
> > -					  msecs_to_jiffies(1000));
> > -	if (!ret) {
> > -		ret = -ETIMEDOUT;
> > -		goto err_vunmap;
> > -	}
> >  
> >  	ret = panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu);
> >  	if (ret < 0)
> >   
> 


  reply	other threads:[~2026-10-05  8:39 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  3:44 [PATCH v12 00/15] Collection of fixes for Panfrost: Perfcnt, RPM, refactorings Adrián Larumbe
2026-09-29  3:44 ` [PATCH v12 01/15] drm/panfrost: Move shrinker initialization and unplug one level down Adrián Larumbe
2026-10-02 13:58   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 02/15] drm/panfrost: Move lock and modparam initialisations into their subsystems Adrián Larumbe
2026-10-02 14:06   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 03/15] drm/panfrost: Move debugfs initialisation to relevant subsystems Adrián Larumbe
2026-10-02 14:10   ` Steven Price
2026-10-06  0:50     ` Adrián Larumbe
2026-09-29  3:44 ` [PATCH v12 04/15] drm/panfrost: Skip NULL checks for clock enable/disabling Adrián Larumbe
2026-10-02 14:14   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 05/15] drm/panfrost: Consolidate device clock management and reset Adrián Larumbe
2026-10-02 14:20   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 06/15] drm/panfrost: Fix PM refcnt and autosuspend issues at device probe/remove Adrián Larumbe
2026-10-02 14:21   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 07/15] drm/panfrost: Explicitly enable MMU interrupts at device init Adrián Larumbe
2026-10-02 14:26   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 08/15] drm/panfrost: Move all DRM device initialisation into device_init() Adrián Larumbe
2026-10-02 14:37   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 09/15] drm/panfrost: Add warning messages to fatal error conditions Adrián Larumbe
2026-10-02 14:59   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 10/15] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Adrián Larumbe
2026-10-02 15:10   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 11/15] drm/panfrost: Move perfcnt GPU disable sequence into a helper Adrián Larumbe
2026-09-29  3:44 ` [PATCH v12 12/15] drm/panfrost: Skip cache flush/invalidate when enabling perfcnt Adrián Larumbe
2026-10-02 15:14   ` Steven Price
2026-10-05  8:38     ` Boris Brezillon [this message]
2026-10-05 15:06       ` Steven Price
2026-10-05 15:37         ` Boris Brezillon
2026-10-05 16:05           ` Steven Price
2026-10-05 16:57             ` Boris Brezillon
2026-09-29  3:44 ` [PATCH v12 13/15] drm/panfrost: Avoid cache flush after perfcnt sample in fully coherent systems Adrián Larumbe
2026-10-02 15:28   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 14/15] drm/panfrost: Introduce a reset lock Adrián Larumbe
2026-10-02 15:34   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 15/15] drm/panfrost: Fix races between perfcnt and reset sequence Adrián Larumbe
2026-10-02 15:44   ` Steven Price

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