[RFC PATCH 0/3] iommu/riscv: Add irqbypass support without MSI page table

[fangyu.yu@linux.alibaba.com]

From: Fangyu Yu <fangyu.yu@linux.alibaba.com>

The MSI page table is an optional feature of the RISC-V IOMMU
specification. Hardware without the MSI_FLAT capability has no such
table, and MSI writes from devices are translated by the second-stage
page table like any other DMA.

Since the second-stage page table governs where those MSI writes land,
forwarding is still possible without an MSI page table: map the guest
IMSIC GPA to the host IMSIC HPA in the second-stage domain and device
MSI writes reach the vCPU's interrupt file directly, bypassing the host
MSI path entirely.

This patch implements irqbypass using second-stage page table, so it
is a functional supplement for IOMMU without MSI page table.

This series is based on Andrew Jones' v3 irqbypass support series [1]

[1] https://lore.kernel.org/linux-riscv/20260928143113.49838-1-andrew.jones@oss.qualcomm.com/

Fangyu Yu (3):
  iommu/riscv: Add guest IMSIC GPA mapping helpers
  iommu/riscv: Extract IRQ forwarding payload validation
  iommu/riscv: Support IRQ forwarding without MSI page tables

 drivers/iommu/riscv/iommu-ir.c | 179 +++++++++++++++++++++++++++++++--
 drivers/iommu/riscv/iommu.c    |  94 +++++++++++++++++
 drivers/iommu/riscv/iommu.h    |  12 +++
 3 files changed, 276 insertions(+), 9 deletions(-)

-- 
2.50.1