* [PATCH 1/2] dt-bindings: cache: qcom,llcc: Add IPQ9650 compatible
2026-10-09 13:50 [PATCH 0/2] Add LLCC configuration for Qualcomm's IPQ9650 Kathiravan Thirumoorthy
@ 2026-10-09 13:50 ` Kathiravan Thirumoorthy
2026-10-12 6:32 ` Krzysztof Kozlowski
2026-10-09 13:50 ` [PATCH 2/2] soc: qcom: llcc: Add LLCC configuration for IPQ9650 Kathiravan Thirumoorthy
1 sibling, 1 reply; 5+ messages in thread
From: Kathiravan Thirumoorthy @ 2026-10-09 13:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Conor Dooley,
Jonathan Cameron, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-kernel, devicetree, Kathiravan Thirumoorthy
Document the Last Level Cache Controller on IPQ9650. Similar to IPQ5424,
IPQ9650 does not have a broadcast region, since there is only one
instance of LLCC.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 2141e5d4de63..3efe68b08d58 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -25,6 +25,7 @@ properties:
- qcom,glymur-llcc
- qcom,hawi-llcc
- qcom,ipq5424-llcc
+ - qcom,ipq9650-llcc
- qcom,kaanapali-llcc
- qcom,nord-llcc
- qcom,qcs615-llcc
@@ -91,6 +92,7 @@ allOf:
contains:
enum:
- qcom,ipq5424-llcc
+ - qcom,ipq9650-llcc
then:
properties:
reg:
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 2/2] soc: qcom: llcc: Add LLCC configuration for IPQ9650
2026-10-09 13:50 [PATCH 0/2] Add LLCC configuration for Qualcomm's IPQ9650 Kathiravan Thirumoorthy
2026-10-09 13:50 ` [PATCH 1/2] dt-bindings: cache: qcom,llcc: Add IPQ9650 compatible Kathiravan Thirumoorthy
@ 2026-10-09 13:50 ` Kathiravan Thirumoorthy
2026-10-09 18:19 ` Abel Vesa
1 sibling, 1 reply; 5+ messages in thread
From: Kathiravan Thirumoorthy @ 2026-10-09 13:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Conor Dooley,
Jonathan Cameron, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, linux-kernel, devicetree, Kathiravan Thirumoorthy
Add the system cache table and configuration for IPQ9650. The LLCC
hardware version in IPQ9650 is v7.1, but similar to IPQ5424, there is
no broadcast region since there is only one LLCC instance.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
drivers/soc/qcom/llcc-qcom.c | 76 ++++++++++++++++++++++++++++++++++++++
include/linux/soc/qcom/llcc-qcom.h | 1 +
2 files changed, 77 insertions(+)
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index d7a42a8040a1..7ffe6b9019d8 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -696,6 +696,66 @@ static const struct llcc_slice_config ipq5424_data[] = {
},
};
+static const struct llcc_slice_config ipq9650_data[] = {
+ {
+ .usecase_id = LLCC_PPE_RXFILL,
+ .slice_id = 1,
+ .max_cap = 128,
+ .priority = 1,
+ .bonus_ways = 0x007F,
+ .retain_on_pc = true,
+ .activate_on_init = true,
+ .write_scid_cacheable_en = true,
+ .stale_en = true,
+ .stale_cap_en = true,
+ .alloc_oneway_en = true,
+ .ovcap_en = true,
+ .ovcap_prio = true,
+ .vict_prio = true,
+ },
+ {
+ .usecase_id = LLCC_CPUSS,
+ .slice_id = 2,
+ .max_cap = 384,
+ .priority = 3,
+ .fixed_size = true,
+ .bonus_ways = 0x007F,
+ .retain_on_pc = true,
+ .activate_on_init = true,
+ .write_scid_cacheable_en = true,
+ .stale_en = true,
+ .stale_cap_en = true,
+ },
+ {
+ .usecase_id = LLCC_PPE_RXDESC,
+ .slice_id = 5,
+ .max_cap = 192,
+ .priority = 3,
+ .bonus_ways = 0x0380,
+ .retain_on_pc = true,
+ .activate_on_init = true,
+ .write_scid_cacheable_en = true,
+ .stale_en = true,
+ .stale_cap_en = true,
+ .alloc_oneway_en = true,
+ .ovcap_en = true,
+ .ovcap_prio = true,
+ .vict_prio = true,
+ },
+ {
+ .usecase_id = LLCC_WLAN_2G,
+ .slice_id = 8,
+ .max_cap = 384,
+ .priority = 3,
+ .bonus_ways = 0xFC00,
+ .retain_on_pc = true,
+ .activate_on_init = true,
+ .write_scid_cacheable_en = true,
+ .stale_en = true,
+ .stale_cap_en = true,
+ },
+};
+
static const struct llcc_slice_config kaanapali_data[] = {
{
.usecase_id = LLCC_CPUSS,
@@ -4673,6 +4733,16 @@ static const struct qcom_llcc_config ipq5424_cfg[] = {
},
};
+static const struct qcom_llcc_config ipq9650_cfg[] = {
+ {
+ .sct_data = ipq9650_data,
+ .size = ARRAY_SIZE(ipq9650_data),
+ .reg_offset = llcc_v6_reg_offset,
+ .edac_reg_offset = &llcc_v6_edac_reg_offset,
+ .no_broadcast_register = true,
+ },
+};
+
static const struct qcom_llcc_config sa8775p_cfg[] = {
{
.sct_data = sa8775p_data,
@@ -4909,6 +4979,11 @@ static const struct qcom_sct_config ipq5424_cfgs = {
.num_config = ARRAY_SIZE(ipq5424_cfg),
};
+static const struct qcom_sct_config ipq9650_cfgs = {
+ .llcc_config = ipq9650_cfg,
+ .num_config = ARRAY_SIZE(ipq9650_cfg),
+};
+
static const struct qcom_sct_config sa8775p_cfgs = {
.llcc_config = sa8775p_cfg,
.num_config = ARRAY_SIZE(sa8775p_cfg),
@@ -5830,6 +5905,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
{ .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs },
{ .compatible = "qcom,hawi-llcc", .data = &hawi_sct_cfgs },
{ .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
+ { .compatible = "qcom,ipq9650-llcc", .data = &ipq9650_cfgs},
{ .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs},
{ .compatible = "qcom,nord-llcc", .data = &nord_cfgs},
{ .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 713cb0221b14..b0ce1a7d5d8d 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -92,6 +92,7 @@
#define LLCC_PPE_RXFILL 102
#define LLCC_WLAN_5G 103
#define LLCC_WLAN_6G 104
+#define LLCC_WLAN_2G 105
/**
* struct llcc_slice_desc - Cache slice descriptor
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread