[PATCH v2 0/2] arm64: dts: qcom: sm8350: Add CPU capacities and power coefficients

[Demeter Barna via B4 Relay <devnull+me.fromdisposition.org@kernel.org>]

Give the SM8350 CPUs their capacities and dynamic power coefficients, so
that the scheduler sees the three clusters as they are and energy aware
scheduling gets an energy model. Both come from Qualcomm's downstream
device trees.

Downstream, the capacities are the same for v1 and v2 silicon, but the
power coefficients are not: patch 2 takes the v2 ones, which the device
tested here (v2.1) carries too. I have no v1 part to check them on; if
v1 boards matter, patch 2 can wait without holding up patch 1.

Tested on a Razer Edge 5G (SM8350 v2.1), whose board support is not
upstream yet: cpu_capacity reads 308, 785 and 1024 once the kernel has
scaled the values by each cluster's maximum frequency (1804, 2419 and
2995 MHz), sched_energy_aware is 1, and the energy model covers all
three clusters. Compared with the same kernel without these patches, an
unpinned CPU-bound task now runs mostly on the X1 and a light periodic
task on the A55s. dtbs_check shows no new warning for the SM8350 boards.
The values come from Razer's kernel release for this device
(Nicole-msm-5.4.254-20240515).

---
Changes in v2:
- From and Signed-off-by now carry my real name instead of the handle
  "fromdisposition" used for v1 (same author). No code changes.
- Link to v1: https://patch.msgid.link/20261012-sm8350-cpu-capacity-v1-0-3d141e0099d5@fromdisposition.org

---
Demeter Barna (2):
      arm64: dts: qcom: sm8350: Add CPU capacities
      arm64: dts: qcom: sm8350: Add CPU dynamic power coefficients

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
---
base-commit: d053e38e614fb2e383b298ce8fc308a780d7f209
change-id: 20261012-sm8350-cpu-capacity-3145a6e159b3

Best regards,
--  
Demeter Barna <me@fromdisposition.org>