From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: me@fromdisposition.org, Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: sm8350: Add CPU capacities
Date: Thu, 15 Oct 2026 15:36:13 +0200 [thread overview]
Message-ID: <99fc9e58-0171-4840-b836-e66a0f3d10e9@oss.qualcomm.com> (raw)
In-Reply-To: <20261012-sm8350-cpu-capacity-v2-1-67ce449becf0@fromdisposition.org>
On 10/12/26 5:56 AM, Demeter Barna via B4 Relay wrote:
> From: Demeter Barna <me@fromdisposition.org>
>
> Without capacity-dmips-mhz every CPU reports a capacity of 1024, so the
> scheduler treats the Cortex-A55, Cortex-A78 and Cortex-X1 cores as
> equal and sets up no asymmetric CPU capacity.
>
> Take the values from Qualcomm's downstream device tree for SM8350
> (lahaina.dtsi in msm-5.4): 1024, 1946 and 2048, halved so that the X1 is
> 1024. Only their ratios matter, as the kernel normalizes them. The
> downstream overlay for v2 silicon (lahaina-v2.dtsi) keeps them.
>
> Assisted-by: LLM
> Signed-off-by: Demeter Barna <me@fromdisposition.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-10-15 13:36 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-12 3:56 [PATCH v2 0/2] arm64: dts: qcom: sm8350: Add CPU capacities and power coefficients Demeter Barna via B4 Relay
2026-10-12 3:56 ` [PATCH v2 1/2] arm64: dts: qcom: sm8350: Add CPU capacities Demeter Barna via B4 Relay
2026-10-15 13:36 ` Konrad Dybcio [this message]
2026-10-12 3:56 ` [PATCH v2 2/2] arm64: dts: qcom: sm8350: Add CPU dynamic power coefficients Demeter Barna via B4 Relay
2026-10-15 13:37 ` Konrad Dybcio
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