From: Magnus Lindholm <linmag7@gmail.com>
To: Imre Kaloz <kaloz@kernel.org>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
andreas@gaisler.com, sparclinux@vger.kernel.org,
davem@davemloft.net, linux-kernel@vger.kernel.org,
stable@vger.kernel.org, Magnus Lindholm <linmag7@gmail.com>
Subject: Re: [PATCH] PCI: Avoid D3 on PLX PEX 8532/8533/8548 downstream ports
Date: Mon, 12 Oct 2026 19:00:57 +0200 [thread overview]
Message-ID: <20261012170113.985649-1-linmag7@gmail.com> (raw)
In-Reply-To: <20260927105609.8813-1-kaloz@kernel.org>
Hi Imre,
Tested this on a Sun Ultra 45 with PLX PEX8532 downstream ports and an
LSI SAS1064 controller.
Without the patch, enabling CONFIG_PCIEPORTBUS reproducibly causes a
Cheetah bus-error panic when mptbase probes the controller. The kernel
boots with pcie_port_pm=off.
With this patch, the same kernel and config boot successfully without
pcie_port_pm=off or pcie_ports=compat. The quirk is applied to all five
PEX8532 downstream ports, the LSISAS1064 initializes, and the modular
mptsas/ext4 setup boots through the initramfs normally.
Tested-by: Magnus Lindholm <linmag7@gmail.com>
next prev parent reply other threads:[~2026-10-12 17:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-27 10:56 Imre Kaloz
2026-10-12 17:00 ` Magnus Lindholm [this message]
2026-10-12 21:34 ` Bjorn Helgaas
2026-10-12 21:41 ` Florian Fainelli
2026-10-12 21:41 ` Bjorn Helgaas
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