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From: Conor Dooley <conor@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Conor Dooley <conor.dooley@microchip.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
Date: Fri, 16 Oct 2026 20:22:27 +0100	[thread overview]
Message-ID: <20261016-uncanny-faculty-222732ee77e6@spud> (raw)
In-Reply-To: <CAMuHMdXkzgE7=n7MJ1-QS10y=f75vO7OribUgM3wb134LN+5kQ@mail.gmail.com>

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On Thu, Oct 15, 2026 at 02:24:42PM +0200, Geert Uytterhoeven wrote:
> Hi Jisheng,
> 
> On Thu, 15 Oct 2026 at 14:08, Jisheng Zhang <jszhang@kernel.org> wrote:
> > On Thu, Oct 15, 2026 at 09:43:40AM +0200, Geert Uytterhoeven wrote:
> > > On Thu, 15 Oct 2026 at 01:48, Jisheng Zhang <jszhang@kernel.org> wrote:
> > > > On Wed, Oct 14, 2026 at 12:20:39PM +0200, Geert Uytterhoeven wrote:
> > > > > These options are irreleant for nommu systems.
> > > > >
> > > > > Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > >
> > > > > --- a/arch/riscv/Kconfig
> > > > > +++ b/arch/riscv/Kconfig
> > > > > @@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
> > > > >
> > > > >  config RISCV_ISA_SV48
> > > > >       bool "Page-Based 48-bit Virtual-Memory System"
> > > > > -     depends on 64BIT
> > > > > +     depends on 64BIT && MMU
> > > > >       default y
> > > > >       help
> > > > >         Add support for the Page-Based 48-bit Virtual-Memory System.
> > > > > @@ -617,7 +617,7 @@ config RISCV_ISA_SV48
> > > > >
> > > > >  config RISCV_ISA_SV57
> > > > >       bool "Page-Based 57-bit Virtual-Memory System"
> > > > > -     depends on 64BIT
> > > > > +     depends on 64BIT && MMU
> > > >
> > > > hmm, I think we also need to make RISCV_ISA_SV57 depend on
> > > > RISCV_ISA_SV48. Otherwise, there's a case: RISCV_ISA_SV57 &&
> > > > !RISCV_ISA_SV48. Human won't make this wrong combination, but
> > > > the random config can.
> > >
> > > Is that really an issue?
> > > If I build a kernel for an SV57-system, do I really need to enable
> > > support for SV48, too? It builds fine without...
> >
> > This is to align with the spec:
> > "implementations that support Sv57 must also support Sv48"
> 
> IMO that is something different.

I think you're right Geert, "implementation" here surely refers to the
device. If someone wants to make their kernel for sv57 capable hardware
only, I think that's fine.

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      reply	other threads:[~2026-10-16 19:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-14 10:20 Geert Uytterhoeven
2026-10-14 23:28 ` Jisheng Zhang
2026-10-15  7:43   ` Geert Uytterhoeven
2026-10-15 11:48     ` Jisheng Zhang
2026-10-15 12:24       ` Geert Uytterhoeven
2026-10-16 19:22         ` Conor Dooley [this message]

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