From: Paul Walmsley <pjw@kernel.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Jisheng Zhang <jszhang@kernel.org>,
Conor Dooley <conor.dooley@microchip.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
Date: Wed, 4 Nov 2026 13:26:36 -0700 (MST) [thread overview]
Message-ID: <9d72bd63-51f7-7952-f325-68b9f50b757f@kernel.org> (raw)
In-Reply-To: <1b1ca4208d725ae0bb834a61636e48728d79cf80.1791973171.git.geert+renesas@glider.be>
On Wed, 14 Oct 2026, Geert Uytterhoeven wrote:
> These options are irreleant for nommu systems.
>
> Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, queued for v7.4-rc.
- Paul
prev parent reply other threads:[~2026-11-04 20:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 10:20 Geert Uytterhoeven
2026-10-14 23:28 ` Jisheng Zhang
2026-10-15 7:43 ` Geert Uytterhoeven
2026-10-15 11:48 ` Jisheng Zhang
2026-10-15 12:24 ` Geert Uytterhoeven
2026-10-16 19:22 ` Conor Dooley
2026-11-04 20:26 ` Paul Walmsley [this message]
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