Re: [PATCH v2] iommu/arm-smmu-v3: Align memory attributes for SMMU-originated accesses

[Jason Gunthorpe <jgg@ziepe.ca>]

On Mon, Oct 05, 2026 at 02:26:08PM -0700, Daniel Mentz wrote:
> On Mon, Oct 5, 2026 at 9:42 AM Robin Murphy <robin.murphy@arm.com> wrote:
> > This still isn't answering the question of "why?" though. Yes the
> > architecture says some things, but if we were strict about avoiding
> > mismatched attributes then Linux couldn't ever support non-coherent DMA
> > at all! Similarly while the architecture does permit SMMU
> > implementations to be picky about their output attributes, does any such
> > implementation actually exist at all, let alone in a system capable of
> > running mainline Linux?
> 
> Fair point that existing implementations have been forgiving in
> practice. My thinking here is simply that a small, self-contained
> cleanup that brings the driver into line with the architecture spec is
> worthwhile on its own merits, even without a known implementation where
> this currently causes problems.

I think we should fix this. At least we have HW that respects these
attributes and they have a performance impact depending on how they
are set. Fortunately at least our HW does not have a functional
"mismatched attribute" issue.

If the FW has selected to run the SMMU in non-coherent mode then all
of the bits should be set to ask the SMMU to run non-coherent. Ditto
for coherent.

No sense in giving up performance due to mis set bits.

These IP integrations are complicated, the FW may be saying to use
non-coherent because some small slice of the system needs that. It
doesn't mean that every access on every bus the SMMU has is forced
non-coherent.

Jason