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From: Ping Li <leeonion.muyu@gmail.com>
To: ben.horgan@arm.com, james.morse@arm.com
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, reinette.chatre@intel.com,
	fenghuay@nvidia.com
Subject: Re: [PATCH] arm_mpam: Do not access MPAMF_ESR on MSCs that do not have it
Date: Tue, 20 Oct 2026 10:57:04 +0800	[thread overview]
Message-ID: <20261020025704.1516317-1-leeonion.muyu@gmail.com> (raw)
In-Reply-To: <4bf21ff8-7e4b-4afe-b3e9-9ee85fcd1c84@arm.com>

Hi Ben,

You are right, thanks for the pointers to the spec.

Our MSC is an MPAM v1.0 implementation without MPAMF_ESR, and the RTL
responds to accesses of unimplemented registers with a bus error
instead of RAZ/WI - which is what motivated the patch. Reading
MPAMF_ESR from the CPU therefore raises an external abort rather than
reading as zero.

Per RLNXX this implementation is not compliant, so the fix belongs in
hardware: the MSC design team will change accesses to unimplemented
registers to be RAZ/WI, as the specification requires.

With that in place the existing driver code is safe, so I am
withdrawing this patch.

Thanks,
Ping

      reply	other threads:[~2026-10-20  2:57 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-19 12:46 Ping Li
2026-10-19 16:18 ` Ben Horgan
2026-10-20  2:57   ` Ping Li [this message]

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