From: Imre Kaloz <kaloz@kernel.org>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] MIPS: sgi-ip32: Report the real CRIME revision
Date: Wed, 21 Oct 2026 21:24:17 +0200 [thread overview]
Message-ID: <20261021192418.7246-4-kaloz@kernel.org> (raw)
In-Reply-To: <20261021192418.7246-1-kaloz@kernel.org>
CRIME_ID's low nibble reads 1 on both rev 1.1 and 1.4 chips, so it does
not give the revision. ID 0xa has it in bits 63:32, and ID 0xb is rev
1.5. Decode it, and drop the unused CRIME_ID_REV.
Signed-off-by: Imre Kaloz <kaloz@kernel.org>
---
arch/mips/include/asm/ip32/crime.h | 2 +-
arch/mips/sgi-ip32/crime.c | 26 +++++++++++++++++++++-----
2 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/ip32/crime.h b/arch/mips/include/asm/ip32/crime.h
index 16c94a27beba..8f87b15b772b 100644
--- a/arch/mips/include/asm/ip32/crime.h
+++ b/arch/mips/include/asm/ip32/crime.h
@@ -22,7 +22,7 @@ struct sgi_crime {
#define CRIME_ID_MASK 0xff
#define CRIME_ID_IDBITS 0xf0
#define CRIME_ID_IDVALUE 0xa0
-#define CRIME_ID_REV 0x0f
+#define CRIME_ID_IDVALUE_B 0xb0
#define CRIME_REV_PETTY 0x00
#define CRIME_REV_11 0x11
#define CRIME_REV_13 0x13
diff --git a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
index b8a0e4cfa9ce..a24424437c6b 100644
--- a/arch/mips/sgi-ip32/crime.c
+++ b/arch/mips/sgi-ip32/crime.c
@@ -27,7 +27,9 @@ EXPORT_SYMBOL_GPL(mace);
void __init crime_init(void)
{
- unsigned int id, rev;
+ static const char * const revs[] = { "1.1", "1.3", "1.4" };
+ const char *rev;
+ u64 id;
const int field = 2 * sizeof(unsigned long);
set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
@@ -35,10 +37,24 @@ void __init crime_init(void)
mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
id = crime->id;
- rev = id & CRIME_ID_REV;
- id = (id & CRIME_ID_IDBITS) >> 4;
- printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
- id, rev, field, (unsigned long) CRIME_BASE);
+ /* The revision of ID 0xa is in the upper word; 0xb is rev 1.5. */
+ switch (id & CRIME_ID_IDBITS) {
+ case CRIME_ID_IDVALUE:
+ rev = revs[min_t(u64, id >> 32, ARRAY_SIZE(revs) - 1)];
+ break;
+ case CRIME_ID_IDVALUE_B:
+ rev = "1.5";
+ break;
+ case 0x00:
+ rev = "Petty";
+ break;
+ default:
+ rev = "?";
+ break;
+ }
+ pr_info("CRIME id %1x rev %s at 0x%0*lx\n",
+ (unsigned int)(id & CRIME_ID_IDBITS) >> 4, rev, field,
+ (unsigned long)CRIME_BASE);
}
irqreturn_t crime_memerr_intr(int irq, void *dev_id)
--
2.47.3
next prev parent reply other threads:[~2026-10-21 19:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 19:24 [PATCH 0/4] MIPS: sgi-ip32: CRIME 1.1 and MACE PCI fixes Imre Kaloz
2026-10-21 19:24 ` [PATCH 1/4] MIPS: sgi-ip32: Mask MACE PCI interrupts in CRIME only Imre Kaloz
2026-10-21 19:24 ` [PATCH 2/4] MIPS: sgi-ip32: Leave MACE PCI control alone in config accesses Imre Kaloz
2026-10-21 19:24 ` Imre Kaloz [this message]
2026-10-21 19:24 ` [PATCH 4/4] MIPS: sgi-ip32: Fence PIO reads on CRIME 1.1 Imre Kaloz
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