From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Takahiro Kuwano <takahiro.kuwano@infineon.com>,
Mark Brown <broonie@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v1 0/4] Add DDR (Dual Data-Rate) support for DW SPI controller
Date: Thu, 22 Oct 2026 03:26:10 -0700 [thread overview]
Message-ID: <20261022102614.75696-1-changhuang.liang@starfivetech.com> (raw)
This series implements DDR support for the DW SPI controller and also
implements 1-4-4-DTR read support for the MX66L1G45G.
This series has been tested on the JHB100 SoC.
# cat /sys/kernel/debug/spi-nor/spi0.1/capabilities
Supported read modes by the flash
[...]
1S-4D-4D
opcode 0xee
mode cycles 0
dummy cycles 6
Changhuang Liang (4):
spi: dw: Add DDR (Dual Data-Rate) support for enhanced SPI mode
mtd: spi-nor: Support mixed 1S-xD-xD DTR protocols in
spi_nor_spimem_setup_op()
mtd: spi-nor: debugfs: Correct DTR protocol names for 1S-xD-xD modes
mtd: spi-nor: macronix: Add 1-4-4 DTR read support for MX66L1G45G
drivers/mtd/spi-nor/core.c | 21 +++++++++-----
drivers/mtd/spi-nor/debugfs.c | 8 +++---
drivers/mtd/spi-nor/macronix.c | 28 +++++++++++++++++-
drivers/spi/spi-dw-core.c | 52 +++++++++++++++++++++++++++++-----
drivers/spi/spi-dw.h | 6 ++++
5 files changed, 96 insertions(+), 19 deletions(-)
--
2.25.1
next reply other threads:[~2026-10-22 10:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-22 10:26 Changhuang Liang [this message]
2026-10-22 10:26 ` [PATCH v1 1/4] spi: dw: Add DDR (Dual Data-Rate) support for enhanced SPI mode Changhuang Liang
2026-10-22 10:41 ` Miquel Raynal
2026-10-22 10:26 ` [PATCH v1 2/4] mtd: spi-nor: Support mixed 1S-xD-xD DTR protocols in spi_nor_spimem_setup_op() Changhuang Liang
2026-10-22 10:45 ` Miquel Raynal
2026-10-22 12:19 ` Michael Walle
2026-10-22 10:26 ` [PATCH v1 3/4] mtd: spi-nor: debugfs: Correct DTR protocol names for 1S-xD-xD modes Changhuang Liang
2026-10-22 10:46 ` Miquel Raynal
2026-10-22 10:26 ` [PATCH v1 4/4] mtd: spi-nor: macronix: Add 1-4-4 DTR read support for MX66L1G45G Changhuang Liang
2026-10-22 10:47 ` Miquel Raynal
2026-10-22 12:23 ` Michael Walle
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261022102614.75696-1-changhuang.liang@starfivetech.com \
--to=changhuang.liang@starfivetech.com \
--cc=broonie@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=miquel.raynal@bootlin.com \
--cc=mwalle@kernel.org \
--cc=pratyush@kernel.org \
--cc=richard@nod.at \
--cc=takahiro.kuwano@infineon.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®