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From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney+clk@redhat.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Subject: [PATCH 2/7] dt-bindings: stm32: add kernel clocks for ETR and STM
Date: Fri, 23 Oct 2026 15:28:07 +0200	[thread overview]
Message-ID: <20261023-ups_mp25_clk_update-v1-2-e906e7a38cb3@foss.st.com> (raw)
In-Reply-To: <20261023-ups_mp25_clk_update-v1-0-e906e7a38cb3@foss.st.com>

Add the kernel clocks of the ETR (CK_KER_ETR) and of the STM
(CK_KER_STM) for STM32MP25, with the matching SCMI clocks
(CK_SCMI_KER_ETR and CK_SCMI_KER_STM).
These are the trace (ATB) clocks of the CoreSight Embedded
Trace Router and System Trace Macrocell, while the bus clocks
only provide register access (APB).

Also rename the bus clocks according to the reference manual,
without changing their values: CK_BUS_STM500 into CK_BUS_STM,
CK_SCMI_STM500 into CK_SCMI_BUS_STM and CK_SCMI_ETR into
CK_SCMI_BUS_ETR.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
---
 include/dt-bindings/clock/st,stm32mp25-rcc.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/dt-bindings/clock/st,stm32mp25-rcc.h b/include/dt-bindings/clock/st,stm32mp25-rcc.h
index 242f61205a9f..cef997508b56 100644
--- a/include/dt-bindings/clock/st,stm32mp25-rcc.h
+++ b/include/dt-bindings/clock/st,stm32mp25-rcc.h
@@ -109,7 +109,7 @@
 /* LOW SPEED MCU CLOCK */
 #define CK_ICN_LS_MCU		88
 
-#define CK_BUS_STM500		89
+#define CK_BUS_STM		89
 #define CK_BUS_FMC		90
 #define CK_BUS_GPU		91
 #define CK_BUS_ETH1		92
@@ -363,6 +363,8 @@
 #define CK_BUS_ETHSWACMCFG	341
 #define CK_BUS_ETHSWACMMSG	342
 #define HSE_DIV2_CK		343
+#define CK_KER_ETR		344
+#define CK_KER_STM		345
 
 #define CK_SCMI_ICN_HS_MCU	0
 #define CK_SCMI_ICN_SDMMC	1
@@ -450,7 +452,7 @@
 #define CK_SCMI_TIMG2		83
 #define CK_SCMI_BKPSRAM		84
 #define CK_SCMI_BSEC		85
-#define CK_SCMI_ETR		87
+#define CK_SCMI_BUS_ETR		87
 #define CK_SCMI_FMC		88
 #define CK_SCMI_GPIOA		89
 #define CK_SCMI_GPIOB		90
@@ -485,6 +487,8 @@
 #define CK_SCMI_SYSDBG		119
 #define CK_SCMI_SYSATB		120
 #define CK_SCMI_TSDBG		121
-#define CK_SCMI_STM500		122
+#define CK_SCMI_BUS_STM		122
+#define CK_SCMI_KER_STM		123
+#define CK_SCMI_KER_ETR		124
 
 #endif /* _DT_BINDINGS_STM32MP25_CLKS_H_ */

-- 
2.43.0


  parent reply	other threads:[~2026-10-23 13:28 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23 13:28 [PATCH 0/7] clk: stm32mp25: add Cortex-M0 D3 clocks, ETR/STM and USB2PHY1 STP Gabriel Fernandez
2026-10-23 13:28 ` [PATCH 1/7] clk: stm32mp25: define the number of clocks in the driver Gabriel Fernandez
2026-10-23 13:28 ` Gabriel Fernandez [this message]
2026-10-23 13:28 ` [PATCH 3/7] clk: stm32mp25: update register with reference manual Gabriel Fernandez
2026-10-23 13:28 ` [PATCH 4/7] dt-bindings: stm32: add clock binding for Cortex-CM0 on stm32mp25 platform Gabriel Fernandez
2026-10-23 13:28 ` [PATCH 5/7] clk: stm32mp25: add clock for D3 peripherals allocation for Cortex-CM0 Gabriel Fernandez
2026-10-23 13:28 ` [PATCH 6/7] dt-bindings: stm32: add binding for usb2phy1stp clock on stm32mp25 Gabriel Fernandez
2026-10-23 13:28 ` [PATCH 7/7] clk: stm32mp25: add ck_ker_usb2phy1_stp clock Gabriel Fernandez

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