Re: [PATCH v3 1/2] riscv: dts: spacemit: k1: mark boot-critical SoC nodes bootph-pre-ram

[Hung-Chun Tseng <alan.tseng.cs@gmail.com>]

Hi Anand,

On Mon, 26 Oct 2026 at 13:38, Anand Moon <linux.amoon@gmail.com> wrote:
> The main issue is that SPL_PINCTRL and SPL_GPIO support are required
> for board bring-up,
> but these options are currently missing from the U-Boot configuration.

Thanks for the log. You're right that the SPL can load the next stage
from a different device than the one the BootROM used. In your log the
BootROM boots from SD and the SPL then fails to find the SPI NOR,
maybe because nothing has set up those pins.

So tagging the pin groups of the boot devices makes sense to me, as
jh7110-common.dtsi does for its i2c5 pins. I'd do that once U-Boot
enables SPL_PINCTRL for K1, so that the tags have a user. It would also
go in the add-on patch rather than the BootROM one, following E's
split. PCIe and Ethernet I'd still leave out, as the SPL does not use
them.

> I am following the approach used in configs/starfive_visionfive2_defconfig
> to keep arch/riscv/dts/spacemit-k1-u-boot.dtsi as minimal and generic
> as possible,

I agree with that goal. For the regulators, I think the board files
should use the names from each board's schematic, and the SPL should
find the rails some other way than by a fixed name. Otherwise every
new board has to use the same names.

Would you like to send the U-Boot side (SPL_PINCTRL/SPL_GPIO)? I'm
happy to test it on a Milk-V Jupiter.

Thanks,
Hung-Chun