From: vmukunda <vmukunda@marvell.com>
To: <linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>
Cc: Sunil Goutham <sgoutham@marvell.com>,
Ratheesh Kannoth <rkannoth@marvell.com>,
Geetha sowjanya <gakula@marvell.com>,
"Subbaraya Sundeep" <sbhatta@marvell.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
"Jakub Kicinski" <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
"Nithin Kumar Dabilpuram" <ndabilpuram@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
vmukunda <vmukunda@marvell.com>
Subject: [PATCH 1/1] octeontx2-af: widen TX scheduler queue index to 11 bits
Date: Mon, 26 Oct 2026 06:23:16 +0000 [thread overview]
Message-ID: <20261026062316.754904-1-vmukunda@marvell.com> (raw)
From: Satha Rao <skoteshwar@marvell.com>
The scheduler queue number packed above the 16-bit register offset
was masked to 10 bits ([25:16]). Queue indices of 1024 and above
were truncated, so configuration and readback used the wrong TX
scheduler queue. The queue number is 11 bits ([26:16]).
Widen TXSCHQ_IDX_MASK to 11 bits and NIX_TX_SCHQ_MASK through bit 26.
Fixes: 98e09d19688c ("octeontx2-af: fix TX scheduler count")
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: vmukunda <vmukunda@marvell.com>
---
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index cece197d1074..1b62f9d7f00a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -1164,7 +1164,7 @@ struct nix_txschq_config {
u8 lvl; /* SMQ/MDQ/TL4/TL3/TL2/TL1 */
u8 read;
#define TXSCHQ_IDX_SHIFT 16
-#define TXSCHQ_IDX_MASK (BIT_ULL(10) - 1)
+#define TXSCHQ_IDX_MASK (BIT_ULL(11) - 1)
#define TXSCHQ_IDX(reg, shift) (((reg) >> (shift)) & TXSCHQ_IDX_MASK)
u8 num_regs;
#define MAX_REGS_PER_MBOX_MSG 20
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 153eb57bad06..68cf730a8372 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -2850,9 +2850,9 @@ static void nix_tl1_default_cfg(struct rvu *rvu, struct nix_hw *nix_hw,
}
/* Register offset - [15:0]
- * Scheduler Queue number - [25:16]
+ * Scheduler Queue number - [26:16]
*/
-#define NIX_TX_SCHQ_MASK GENMASK_ULL(25, 0)
+#define NIX_TX_SCHQ_MASK GENMASK_ULL(26, 0)
static int nix_txschq_cfg_read(struct rvu *rvu, struct nix_hw *nix_hw,
int blkaddr, struct nix_txschq_config *req,
--
2.25.1
next reply other threads:[~2026-10-26 6:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 6:23 vmukunda [this message]
2026-10-26 6:26 ` netdev-bot+sinfo
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