[PATCH 0/2] Add Exynos5515 USB PHY support

[PATCH 0/2] Add Exynos5515 USB PHY support

[Aiden Isik via B4 Relay]

Hi there,

This patchset adds support for the Exynos5515 USB PHY.

The PHY supports High-Speed (UTMI+), and also appears to support
Super-Speed (PIPE3) USB according to Samsung's own code to drive this PHY.
However, none of the Exynos5515 hardware which I am aware of actually
supports Super-Speed, therefore I am unable to test that part, hence PIPE3
support being omitted.

This patchset was tested on a Samsung Galaxy Watch FE using the USB serial
gadget.

This patchset also depends on [1], due to using an
exynos5_usbdrd_phy_drvdata member (.n_phy_cfg) which was introduced to fix
an out-of-bounds access bug.

It also depends on [2] and [3] in that they are the clock and pinctrl
drivers for Exynos5515, and without them this driver cannot talk to the
PHY. It does however build without them. [2] should be close to being
merged into Torvalds' tree, and [3] was just submitted by myself a few
days ago.

[1] - https://lore.kernel.org/all/20261020063559.3530901-1-selvarasu.g@samsung.com/
[2] - https://lore.kernel.org/all/20260818-for-next-lucky7-clock-v2-0-cda0cc80f158@member.fsf.org/
[3] - https://lore.kernel.org/all/20261020-for-next-lucky7-pinctrl-v2-0-b6b0e6065452@member.fsf.org/

Kind regards,
- Aiden Isik

Signed-off-by: Aiden Isik <aidenisik@member.fsf.org>
---
Aiden Isik (2):
      dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos5515 compatible
      phy: exynos5-usbdrd: Add support for the Exynos5515 usbdrd phy

 .../bindings/phy/samsung,usb3-drd-phy.yaml         |  2 +
 drivers/phy/samsung/phy-exynos5-usbdrd.c           | 43 ++++++++++++++++++++++
 2 files changed, 45 insertions(+)
---
base-commit: 5260a8a68459dd67262970d38f1b2496f0cad371
change-id: 20261022-for-next-lucky7-usb-phy-77244b2fc98e

Best regards,
--  
Aiden Isik <aidenisik@member.fsf.org>

[PATCH 1/2] dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos5515 compatible

[Aiden Isik via B4 Relay]

From: Aiden Isik <aidenisik@member.fsf.org>

Add the compatible string for exynos5515-usbdrd-phy. This PHY is
compatible with the Exynos5420 PHY when running in High-Speed mode,
in that it uses two clocks, phy and ref, so document it as such.

Signed-off-by: Aiden Isik <aidenisik@member.fsf.org>
---
 Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
index a1b3d9e6a094..a9af03066d8d 100644
--- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
@@ -30,6 +30,7 @@ properties:
       - samsung,exynos5250-usbdrd-phy
       - samsung,exynos5420-usbdrd-phy
       - samsung,exynos5433-usbdrd-phy
+      - samsung,exynos5515-usbdrd-phy
       - samsung,exynos7-usbdrd-phy
       - samsung,exynos7870-usbdrd-phy
       - samsung,exynos850-usbdrd-phy
@@ -233,6 +234,7 @@ allOf:
             enum:
               - samsung,exynos5250-usbdrd-phy
               - samsung,exynos5420-usbdrd-phy
+              - samsung,exynos5515-usbdrd-phy
               - samsung,exynos7870-usbdrd-phy
               - samsung,exynos850-usbdrd-phy
               - samsung,exynos990-usbdrd-phy

-- 
2.54.0

[PATCH 2/2] phy: exynos5-usbdrd: Add support for the Exynos5515 usbdrd phy

[Aiden Isik via B4 Relay]

From: Aiden Isik <aidenisik@member.fsf.org>

The Exynos5515 USBDRD PHY is a USB PHY which supports USB Super-Speed
and High-Speed. Add support for High-Speed (UTMI+) operation.

Signed-off-by: Aiden Isik <aidenisik@member.fsf.org>
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 43 ++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index f10cf7b6e0aa..8718e8f01e46 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -2075,6 +2075,46 @@ static const struct exynos5_usbdrd_phy_drvdata exynos5433_usbdrd_phy = {
 	.n_regulators		= ARRAY_SIZE(exynos5_regulator_names),
 };
 
+static const struct exynos5_usbdrd_phy_tuning exynos5515_tunes_utmi_postinit[] = {
+	PHY_TUNING_ENTRY_PHY(EXYNOS850_DRD_HSPPARACON,
+			     (HSPPARACON_TXVREF | HSPPARACON_TXRISE |
+			      HSPPARACON_TXRES |
+			      HSPPARACON_TXPREEMPPULSE |
+			      HSPPARACON_TXPREEMPAMP |
+			      HSPPARACON_TXHSXV | HSPPARACON_TXFSLS |
+			      HSPPARACON_SQRX | HSPPARACON_OTG |
+			      HSPPARACON_COMPDIS),
+			     (FIELD_PREP_CONST(HSPPARACON_TXVREF, 15) |
+			      FIELD_PREP_CONST(HSPPARACON_TXRISE, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_TXRES, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_TXPREEMPPULSE, 0) |
+			      FIELD_PREP_CONST(HSPPARACON_TXPREEMPAMP, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_TXHSXV, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_TXFSLS, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_SQRX, 7) |
+			      FIELD_PREP_CONST(HSPPARACON_OTG, 2) |
+			      FIELD_PREP_CONST(HSPPARACON_COMPDIS, 7))),
+	PHY_TUNING_ENTRY_LAST
+};
+
+static const struct exynos5_usbdrd_phy_tuning *exynos5515_tunes[PTS_MAX] = {
+	[PTS_UTMI_POSTINIT] = exynos5515_tunes_utmi_postinit,
+};
+
+static const struct exynos5_usbdrd_phy_drvdata exynos5515_usbdrd_phy = {
+	.phy_cfg		= phy_cfg_exynos850,
+	.n_phy_cfg		= ARRAY_SIZE(phy_cfg_exynos850),
+	.phy_ops		= &exynos850_usbdrd_phy_ops,
+	.phy_tunes		= exynos5515_tunes,
+	.pmu_offset_usbdrd0_phy	= EXYNOS990_PHY_CTRL_USB20,
+	.clk_names		= exynos5_clk_names,
+	.n_clks			= ARRAY_SIZE(exynos5_clk_names),
+	.core_clk_names		= exynos5_core_clk_names,
+	.n_core_clks		= ARRAY_SIZE(exynos5_core_clk_names),
+	.regulator_names	= exynos5_regulator_names,
+	.n_regulators		= ARRAY_SIZE(exynos5_regulator_names),
+};
+
 static const struct exynos5_usbdrd_phy_drvdata exynos7_usbdrd_phy = {
 	.phy_cfg		= phy_cfg_exynos5,
 	.n_phy_cfg		= ARRAY_SIZE(phy_cfg_exynos5),
@@ -2936,6 +2976,9 @@ static const struct of_device_id exynos5_usbdrd_phy_of_match[] = {
 	}, {
 		.compatible = "samsung,exynos5433-usbdrd-phy",
 		.data = &exynos5433_usbdrd_phy
+	}, {
+		.compatible = "samsung,exynos5515-usbdrd-phy",
+		.data = &exynos5515_usbdrd_phy
 	}, {
 		.compatible = "samsung,exynos7-usbdrd-phy",
 		.data = &exynos7_usbdrd_phy

-- 
2.54.0

Re: [PATCH 1/2] dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos5515 compatible

[Krzysztof Kozlowski]

On Thu, Oct 22, 2026 at 05:46:36PM +0100, Aiden Isik wrote:
> Add the compatible string for exynos5515-usbdrd-phy. This PHY is
> compatible with the Exynos5420 PHY when running in High-Speed mode,
> in that it uses two clocks, phy and ref, so document it as such.
> 
> Signed-off-by: Aiden Isik <aidenisik@member.fsf.org>
> ---
>  Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof