From: shengjiu.wang@oss.nxp.com
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
shengjiu.wang@nxp.com, daniel.baluta@nxp.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
andersson@kernel.org, mathieu.poirier@linaro.org,
Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, p.zabel@pengutronix.de,
linux-remoteproc@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] arm64: dts: imx8ulp: add HiFi4 DSP node
Date: Thu, 29 Oct 2026 15:32:56 +0800 [thread overview]
Message-ID: <20261029073257.84594-4-shengjiu.wang@oss.nxp.com> (raw)
In-Reply-To: <20261029073257.84594-1-shengjiu.wang@oss.nxp.com>
From: Shengjiu Wang <shengjiu.wang@nxp.com>
Add a HiFi4 DSP node to the i.MX8ULP device tree. The node is
introduced with all required registers, clocks, clock-names,
firmware reference and mailbox connections, but its status is set
to “disabled”. This prepares the SoC for HiFi4 DSP support while
leaving the node inactive until a platform explicitly enables it.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index ac8293f81c6b..fd2c6b9d3c87 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/imx8ulp-power.h>
+#include <dt-bindings/reset/fsl,imx8ulp-sim-lpav.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8ulp-pinfunc.h"
@@ -208,6 +209,28 @@ soc: soc@0 {
ranges = <0x0 0x0 0x0 0x40000000>,
<0x60000000 0x0 0x60000000 0x1000000>;
+ dsp: dsp@21170000 {
+ compatible = "fsl,imx8ulp-hifi4";
+ reg = <0x21170000 0x20000>;
+ clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>,
+ <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>,
+ <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
+ <&cgc1 IMX8ULP_CLK_DUMMY>,
+ <&pcc5 IMX8ULP_CLK_MU3_B>;
+ clock-names = "ipg", "ocram", "core", "debug", "mu";
+ firmware-name = "imx/dsp/hifi4.bin";
+ mboxes = <&mu3 0 0>,
+ <&mu3 1 0>,
+ <&mu3 3 0>;
+ mbox-names = "tx", "rx", "rxdb";
+ power-domains = <&scmi_devpd IMX8ULP_PD_HIFI4>;
+ resets = <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_STALL>,
+ <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_RST>,
+ <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_DBG_RST>;
+ reset-names = "runstall", "softreset", "dbgreset";
+ status = "disabled";
+ };
+
s4muap: mailbox@27020000 {
compatible = "fsl,imx8ulp-mu-s4";
reg = <0x27020000 0x10000>;
--
2.34.1
next prev parent reply other threads:[~2026-10-29 7:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 7:32 [PATCH 0/4] Enable DSP device for i.MX8ULP shengjiu.wang
2026-10-29 7:32 ` [PATCH 1/4] dt-bindings: dsp: fsl,dsp: document debug reset control shengjiu.wang
2026-11-02 11:04 ` Krzysztof Kozlowski
2026-10-29 7:32 ` [PATCH 2/4] remoteproc: imx_dsp_rproc: Add softreset and dbgreset handling shengjiu.wang
2026-10-29 7:32 ` shengjiu.wang [this message]
2026-10-29 7:32 ` [PATCH 4/4] arm64: dts: imx8ulp-evk: enable HiFi4 DSP device shengjiu.wang
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