[PATCH 0/2] riscv: dts: sifive: Add the missing FU740 CLINT

[PATCH 0/2] riscv: dts: sifive: Add the missing FU740 CLINT

[Han Gao via B4 Relay]

coreboot and U-Boot already describe the FU740 CLINT for OpenSBI.
Add the missing node to the Linux device tree and document its
compatible.

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
---
Han Gao (2):
      dt-bindings: timer: add the FU740 CLINT
      riscv: dts: sifive: describe the FU740 CLINT

 Documentation/devicetree/bindings/timer/sifive,clint.yaml |  1 +
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi                | 11 +++++++++++
 2 files changed, 12 insertions(+)
---
base-commit: cbbddb6b08cc9900a87cccaa9b22bbe06aa4f50a
change-id: 20261101-b4-sifive-fu740-clint-c972e84f3171

Best regards,
-- 
Han Gao <gaohan@iscas.ac.cn>

[PATCH 1/2] dt-bindings: timer: add the FU740 CLINT

[Han Gao via B4 Relay]

From: Han Gao <gaohan@iscas.ac.cn>

Document the FU740 CLINT compatible.

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
---
 Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index d53f52e80d887b40c0d20049d86867c8a5b6fae2..13a8638f6b08e87bff3e37f947b0fe5458ebb38d 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -33,6 +33,7 @@ properties:
               - eswin,eic7700-clint     # ESWIN EIC7700
               - microchip,pic64gx-clint # Microchip PIC64GX
               - sifive,fu540-c000-clint # SiFive FU540
+              - sifive,fu740-c000-clint # SiFive FU740
               - spacemit,k1-clint       # SpacemiT K1
               - starfive,jh7100-clint   # StarFive JH7100
               - starfive,jh7110-clint   # StarFive JH7110

-- 
2.47.3

Re: [PATCH 1/2] dt-bindings: timer: add the FU740 CLINT

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/2] riscv: dts: sifive: describe the FU740 CLINT

[Han Gao via B4 Relay]

From: Han Gao <gaohan@iscas.ac.cn>

coreboot and U-Boot already describe the FU740 CLINT for OpenSBI,
but Linux's device tree is missing it. Add the node for all five harts.

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
---
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index 6150f3397bff9269767b190d961024a98b367ddc..4dd74c9a033e3ec6b1ff2706a9c0c11824ea4a07 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -179,6 +179,17 @@ soc {
 		#size-cells = <2>;
 		compatible = "simple-bus";
 		ranges;
+
+		clint: timer@2000000 {
+			compatible = "sifive,fu740-c000-clint", "sifive,clint0";
+			reg = <0x0 0x2000000 0x0 0x10000>;
+			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
+					      <&cpu1_intc 3>, <&cpu1_intc 7>,
+					      <&cpu2_intc 3>, <&cpu2_intc 7>,
+					      <&cpu3_intc 3>, <&cpu3_intc 7>,
+					      <&cpu4_intc 3>, <&cpu4_intc 7>;
+		};
+
 		plic0: interrupt-controller@c000000 {
 			#interrupt-cells = <1>;
 			#address-cells = <0>;

-- 
2.47.3