From: Conor Dooley <conor@kernel.org>
To: marouene.boubakri@oss.nxp.com
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Anup Patel <anup@brainfault.org>,
Samuel Holland <samuel.holland@sifive.com>,
Radu Rendec <radu@rendec.net>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 6/8] riscv: add ARCH_OPENHWGROUP Kconfig option
Date: Mon, 2 Nov 2026 19:24:14 +0000 [thread overview]
Message-ID: <20261102-rice-large-30bcaaf9de67@spud> (raw)
In-Reply-To: <20261102141727.640769-7-marouene.boubakri@oss.nxp.com>
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On Mon, Nov 02, 2026 at 03:17:25PM +0100, marouene.boubakri@oss.nxp.com wrote:
> From: Marouene Boubakri <marouene.boubakri@oss.nxp.com>
>
> Add the SoC selection entry for OpenHW Group platforms, which is used
> to build the device trees of the CVA6 APU FPGA platform.
>
> Signed-off-by: Marouene Boubakri <marouene.boubakri@oss.nxp.com>
> ---
> arch/riscv/Kconfig.socs | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index cecbce0c49..289448e489 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -26,6 +26,15 @@ config ARCH_MICROCHIP
> help
> This enables support for Microchip SoC platforms.
>
> +config ARCH_OPENHWGROUP
> + bool "OpenHW Group SoCs"
> + help
> + This enables support for OpenHW Group SoC platform hardware.
> + Current support is for the CVA6 APU, the FPGA platform built
> + around the CVA6 application class core, with the 32-bit (cv32a6)
> + and 64-bit (cv64a6) configurations of the core on the Digilent
> + Genesys 2 board.
Delete all this, it'll just bitrot over time.
> +
> config ARCH_RENESAS
> bool "Renesas RISC-V SoCs"
> help
> --
> 2.43.0
>
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next prev parent reply other threads:[~2026-11-02 19:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 14:17 [PATCH 0/8] riscv: add OpenHW Group CVA6 APU on Digilent Genesys 2 marouene.boubakri
2026-11-02 14:17 ` [PATCH 1/8] dt-bindings: vendor-prefixes: add OpenHW Group marouene.boubakri
2026-11-02 19:13 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 2/8] dt-bindings: riscv: cpus: add OpenHW Group CVA6 compatibles marouene.boubakri
2026-11-02 19:14 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 3/8] dt-bindings: timer: sifive,clint: add OpenHW Group CVA6 APU marouene.boubakri
2026-11-02 19:15 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 4/8] dt-bindings: interrupt-controller: sifive,plic: " marouene.boubakri
2026-11-02 19:18 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 5/8] dt-bindings: riscv: add OpenHW Group CVA6 APU boards marouene.boubakri
2026-11-02 19:23 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 6/8] riscv: add ARCH_OPENHWGROUP Kconfig option marouene.boubakri
2026-11-02 19:24 ` Conor Dooley [this message]
2026-11-02 14:17 ` [PATCH 7/8] riscv: dts: openhwgroup: add CVA6 APU on Digilent Genesys 2 marouene.boubakri
2026-11-02 19:30 ` Conor Dooley
2026-11-02 14:17 ` [PATCH 8/8] riscv: defconfig: enable OpenHW Group CVA6 APU support marouene.boubakri
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