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From: "Johnny.Fan" <johnny.fan@cixtech.com>
To: will@kernel.org, mark.rutland@arm.com
Cc: suzuki.poulose@arm.com, leo.yan@arm.com, jeremy.linton@arm.com,
	maz@kernel.org, mike.leach@arm.com, james.clark@linaro.org,
	alexander.shishkin@linux.intel.com, coresight@lists.linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	cix-kernel-upstream@cixtech.com, jie.fu@cixtech.com,
	bob.zhang@cixtech.com, "Johnny.Fan" <Johnny.Fan@cixtech.com>
Subject: [PATCH v3 0/2] perf: arm_spe: Support heterogeneous ACPI systems
Date: Mon,  2 Nov 2026 16:41:50 +0800	[thread overview]
Message-ID: <20261102084153.3975282-1-johnny.fan@cixtech.com> (raw)

From: "Johnny.Fan" <Johnny.Fan@cixtech.com>

This series makes SPE and TRBE usable on heterogeneous ACPI systems,
where not all CPUs implement the feature and the ones that do may use
different PPIs. The MADT describes both per CPU, and the PPTT hetero id
tells identical implementations apart.

Patch 1 lets the drivers take the CPU mask from platform data; patch 2
creates one platform device per (hetero id, interrupt) group and passes
the mask along.

v2: https://lore.kernel.org/all/20261021020322.3015121-1-johnny.fan@cixtech.com/

Changes since v2:
- Split into two patches: drivers first (no functional change), then
  the ACPI producer. This keeps every patch bisectable; with the
  opposite order an intermediate kernel would create devices whose CPU
  mask falls back to cpu_possible_mask and probe CPUs that do not
  implement the feature.
- Reject GICC entries with inconsistent lengths instead of silently
  skipping them, while still treating tables that never describe the
  field (pre-ACPI 6.3 for SPE, 6.5 for TRBE) as "feature absent".
- Allocate the groups dynamically instead of a possible-CPUs-sized
  array; the counting pass remains as the firmware consistency check.
- Only release a shared GSI once no successfully registered device uses
  it, fixing the mapping leak when every group on that GSI fails.

On Leo's question about exposing the mask through
platform_get_irq_affinity(): these devices are synthetic and have no
fwnode, so the lookup falls back to cpu_possible_mask. The mask is a
property of the device, not of the interrupt: a GSI can be shared by
groups with disjoint CPU masks, so a per-interrupt affinity would be
wrong for each of them. ACPI cannot describe PPI affinity today
anyway.

Johnny.Fan (2):
  perf: arm_pmu: Accept a per-device CPU mask from platform data
  perf: arm_pmu_acpi: Support heterogeneous ACPI systems

 drivers/hwtracing/coresight/coresight-trbe.c |  22 +-
 drivers/perf/arm_pmu_acpi.c                  | 238 +++++++++++++------
 drivers/perf/arm_spe_pmu.c                   |  10 +-
 include/linux/perf/arm_pmu.h                 |  10 +
 4 files changed, 205 insertions(+), 75 deletions(-)

--
2.55.0


             reply	other threads:[~2026-11-02  8:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-02  8:41 Johnny.Fan [this message]
2026-11-02  8:41 ` [PATCH v3 1/2] perf: arm_pmu: Accept a per-device CPU mask from platform data Johnny.Fan
2026-11-02  8:41 ` [PATCH v3 2/2] perf: arm_pmu_acpi: Support heterogeneous ACPI systems Johnny.Fan

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