From: Alexandre Courbot <acourbot@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
Alice Ryhl <aliceryhl@google.com>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>
Cc: John Hubbard <jhubbard@nvidia.com>,
Alistair Popple <apopple@nvidia.com>,
Timur Tabi <ttabi@nvidia.com>,
Eliot Courtney <ecourtney@nvidia.com>,
Zhi Wang <zhiw@nvidia.com>,
nova-gpu@lists.linux.dev, rust-for-linux@vger.kernel.org,
linux-kernel@vger.kernel.org,
Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH 7/7] gpu: nova-core: falcon: check the per-block DMA offsets for overflow
Date: Tue, 03 Nov 2026 19:22:45 +0900 [thread overview]
Message-ID: <20261103-r000-fw-v1-7-e3d38fc130e3@nvidia.com> (raw)
In-Reply-To: <20261103-r000-fw-v1-0-e3d38fc130e3@nvidia.com>
From: John Hubbard <jhubbard@nvidia.com>
Each block of a falcon DMA transfer is addressed by the start offset of
the transfer plus the block's position. The two additions were plain, so
a source or destination offset near the top of the 32-bit range would
have wrapped or panicked rather than failing the transfer.
Add the two with checked arithmetic and fail the transfer with EOVERFLOW
when a sum does not fit.
Assisted-by: LLM
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
[acourbot: split out of the DMA helper patch of v3.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
drivers/gpu/nova-core/falcon.rs | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index fb43d0ed2821..c54875e55da5 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -599,10 +599,11 @@ fn dma_wr(
// Perform a transfer of size `DMA_LEN`.
self.pfalcon.write_reg(
regs::NV_PFALCON_FALCON_DMATRFMOFFS::zeroed()
- .try_with_offs(load_offsets.dst_start + pos)?,
+ .try_with_offs(load_offsets.dst_start.checked_add(pos).ok_or(EOVERFLOW)?)?,
);
self.pfalcon.write_reg(
- regs::NV_PFALCON_FALCON_DMATRFFBOFFS::zeroed().with_offs(src_start + pos),
+ regs::NV_PFALCON_FALCON_DMATRFFBOFFS::zeroed()
+ .with_offs(src_start.checked_add(pos).ok_or(EOVERFLOW)?),
);
self.pfalcon.write_reg(cmd);
--
2.56.0
prev parent reply other threads:[~2026-11-03 10:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 10:22 [PATCH 0/7] gpu: nova-core: generic bootloader and falcon DMA changes for r000 Alexandre Courbot
2026-11-03 10:22 ` [PATCH 1/7] gpu: nova-core: separate the generic falcon bootloader from FWSEC Alexandre Courbot
2026-11-03 10:22 ` [PATCH 2/7] gpu: nova-core: place the generic bootloader at the top of IMEM Alexandre Courbot
2026-11-03 10:22 ` [PATCH 3/7] gpu: nova-core: move the bootloader DMEM descriptor out of FWSEC Alexandre Courbot
2026-11-03 10:22 ` [PATCH 4/7] gpu: nova-core: run the generic bootloader from its own type Alexandre Courbot
2026-11-03 10:22 ` [PATCH 5/7] gpu: nova-core: falcon: allow DMEM DMA transfers to request tagging Alexandre Courbot
2026-11-03 10:22 ` [PATCH 6/7] gpu: nova-core: falcon: allow DMA transfers to read from a framebuffer address Alexandre Courbot
2026-11-03 10:22 ` Alexandre Courbot [this message]
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